#Clock
set_property -dict {PACKAGE_PIN K21 IOSTANDARD LVCMOS33} [get_ports clk_50M]
set_property -dict {PACKAGE_PIN H21 IOSTANDARD LVCMOS33} [get_ports clk_11M0592]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_11M0592_IBUF]

create_clock -period 20.000 -name clk_50M -waveform {0.000 10.000} [get_ports clk_50M]
create_clock -period 90.422 -name clk_11M0592 -waveform {0.000 45.211} [get_ports clk_11M0592]

#Touch Button
set_property -dict {PACKAGE_PIN T2 IOSTANDARD LVCMOS33} [get_ports {touch_btn[0]}]
set_property -dict {PACKAGE_PIN M1 IOSTANDARD LVCMOS33} [get_ports {touch_btn[1]}]
set_property -dict {PACKAGE_PIN P3 IOSTANDARD LVCMOS33} [get_ports {touch_btn[2]}]
set_property -dict {PACKAGE_PIN U2 IOSTANDARD LVCMOS33} [get_ports {touch_btn[3]}]
set_property -dict {PACKAGE_PIN U1 IOSTANDARD LVCMOS33} [get_ports clock_btn]
set_property -dict {PACKAGE_PIN U5 IOSTANDARD LVCMOS33} [get_ports reset_btn]

#required if touch button used as manual clock source
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clock_btn_IBUF]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets reset_btn_IBUF]

#CPLD GPIO 12-16
#set_property -dict {PACKAGE_PIN J14 IOSTANDARD LVCMOS33} [get_ports {uart_wrn}]
#set_property -dict {PACKAGE_PIN L14 IOSTANDARD LVCMOS33} [get_ports {uart_rdn}]
#set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS33} [get_ports {uart_tbre}]
#set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS33} [get_ports {uart_tsre}]
#set_property -dict {PACKAGE_PIN L15 IOSTANDARD LVCMOS33} [get_ports {uart_dataready}]

#Ext serial
set_property -dict {IOSTANDARD LVCMOS33 PACKAGE_PIN H18} [get_ports txd]
set_property -dict {IOSTANDARD LVCMOS33 PACKAGE_PIN J20} [get_ports rxd]

#Digital Video
set_property -dict {PACKAGE_PIN H22 IOSTANDARD LVCMOS33} [get_ports video_clk]
set_property -dict {PACKAGE_PIN E26 IOSTANDARD LVCMOS33} [get_ports {video_red[2]}]
set_property -dict {PACKAGE_PIN F24 IOSTANDARD LVCMOS33} [get_ports {video_red[1]}]
set_property -dict {PACKAGE_PIN K23 IOSTANDARD LVCMOS33} [get_ports {video_red[0]}]
set_property -dict {PACKAGE_PIN F23 IOSTANDARD LVCMOS33} [get_ports {video_green[2]}]
set_property -dict {PACKAGE_PIN E23 IOSTANDARD LVCMOS33} [get_ports {video_green[1]}]
set_property -dict {PACKAGE_PIN K22 IOSTANDARD LVCMOS33} [get_ports {video_green[0]}]
set_property -dict {PACKAGE_PIN D25 IOSTANDARD LVCMOS33} [get_ports {video_blue[1]}]
set_property -dict {PACKAGE_PIN E25 IOSTANDARD LVCMOS33} [get_ports {video_blue[0]}]
set_property -dict {PACKAGE_PIN J24 IOSTANDARD LVCMOS33} [get_ports video_hsync]
set_property -dict {PACKAGE_PIN H24 IOSTANDARD LVCMOS33} [get_ports video_vsync]
set_property -dict {PACKAGE_PIN G24 IOSTANDARD LVCMOS33} [get_ports video_de]

#LEDS
set_property -dict {PACKAGE_PIN B24 IOSTANDARD LVCMOS33} [get_ports {leds[0]}]
set_property -dict {PACKAGE_PIN E21 IOSTANDARD LVCMOS33} [get_ports {leds[1]}]
set_property -dict {PACKAGE_PIN A24 IOSTANDARD LVCMOS33} [get_ports {leds[2]}]
set_property -dict {PACKAGE_PIN D23 IOSTANDARD LVCMOS33} [get_ports {leds[3]}]
set_property -dict {PACKAGE_PIN C22 IOSTANDARD LVCMOS33} [get_ports {leds[4]}]
set_property -dict {PACKAGE_PIN C21 IOSTANDARD LVCMOS33} [get_ports {leds[5]}]
set_property -dict {PACKAGE_PIN E20 IOSTANDARD LVCMOS33} [get_ports {leds[6]}]
set_property -dict {PACKAGE_PIN B22 IOSTANDARD LVCMOS33} [get_ports {leds[7]}]
set_property -dict {PACKAGE_PIN C23 IOSTANDARD LVCMOS33} [get_ports {leds[8]}]
set_property -dict {PACKAGE_PIN A23 IOSTANDARD LVCMOS33} [get_ports {leds[9]}]
set_property -dict {PACKAGE_PIN D21 IOSTANDARD LVCMOS33} [get_ports {leds[10]}]
set_property -dict {PACKAGE_PIN A18 IOSTANDARD LVCMOS33} [get_ports {leds[11]}]
set_property -dict {PACKAGE_PIN D20 IOSTANDARD LVCMOS33} [get_ports {leds[12]}]
set_property -dict {PACKAGE_PIN A22 IOSTANDARD LVCMOS33} [get_ports {leds[13]}]
set_property -dict {PACKAGE_PIN A20 IOSTANDARD LVCMOS33} [get_ports {leds[14]}]
set_property -dict {PACKAGE_PIN B20 IOSTANDARD LVCMOS33} [get_ports {leds[15]}]

#DPY0
set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS33} [get_ports {dpy0[0]}]
set_property -dict {PACKAGE_PIN D19 IOSTANDARD LVCMOS33} [get_ports {dpy0[1]}]
set_property -dict {PACKAGE_PIN B21 IOSTANDARD LVCMOS33} [get_ports {dpy0[2]}]
set_property -dict {PACKAGE_PIN A19 IOSTANDARD LVCMOS33} [get_ports {dpy0[3]}]
set_property -dict {PACKAGE_PIN E18 IOSTANDARD LVCMOS33} [get_ports {dpy0[4]}]
set_property -dict {PACKAGE_PIN C19 IOSTANDARD LVCMOS33} [get_ports {dpy0[5]}]
set_property -dict {PACKAGE_PIN B17 IOSTANDARD LVCMOS33} [get_ports {dpy0[6]}]
set_property -dict {PACKAGE_PIN C17 IOSTANDARD LVCMOS33} [get_ports {dpy0[7]}]

#DPY1
set_property -dict {PACKAGE_PIN A17 IOSTANDARD LVCMOS33} [get_ports {dpy1[0]}]
set_property -dict {PACKAGE_PIN D16 IOSTANDARD LVCMOS33} [get_ports {dpy1[1]}]
set_property -dict {PACKAGE_PIN E17 IOSTANDARD LVCMOS33} [get_ports {dpy1[2]}]
set_property -dict {PACKAGE_PIN F17 IOSTANDARD LVCMOS33} [get_ports {dpy1[3]}]
set_property -dict {PACKAGE_PIN E16 IOSTANDARD LVCMOS33} [get_ports {dpy1[4]}]
set_property -dict {PACKAGE_PIN G16 IOSTANDARD LVCMOS33} [get_ports {dpy1[5]}]
set_property -dict {PACKAGE_PIN F15 IOSTANDARD LVCMOS33} [get_ports {dpy1[6]}]
set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS33} [get_ports {dpy1[7]}]

#DIP_SW
set_property -dict {PACKAGE_PIN T3 IOSTANDARD LVCMOS33} [get_ports {dip_sw[0]}]
set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVCMOS33} [get_ports {dip_sw[1]}]
set_property -dict {PACKAGE_PIN M2 IOSTANDARD LVCMOS33} [get_ports {dip_sw[2]}]
set_property -dict {PACKAGE_PIN P1 IOSTANDARD LVCMOS33} [get_ports {dip_sw[3]}]
set_property -dict {PACKAGE_PIN P4 IOSTANDARD LVCMOS33} [get_ports {dip_sw[4]}]
set_property -dict {PACKAGE_PIN L5 IOSTANDARD LVCMOS33} [get_ports {dip_sw[5]}]
set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS33} [get_ports {dip_sw[6]}]
set_property -dict {PACKAGE_PIN N6 IOSTANDARD LVCMOS33} [get_ports {dip_sw[7]}]
set_property -dict {PACKAGE_PIN M6 IOSTANDARD LVCMOS33} [get_ports {dip_sw[8]}]
set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS33} [get_ports {dip_sw[9]}]
set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS33} [get_ports {dip_sw[10]}]
set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS33} [get_ports {dip_sw[11]}]
set_property -dict {PACKAGE_PIN M5 IOSTANDARD LVCMOS33} [get_ports {dip_sw[12]}]
set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS33} [get_ports {dip_sw[13]}]
set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVCMOS33} [get_ports {dip_sw[14]}]
set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVCMOS33} [get_ports {dip_sw[15]}]
set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVCMOS33} [get_ports {dip_sw[16]}]
set_property -dict {PACKAGE_PIN K1 IOSTANDARD LVCMOS33} [get_ports {dip_sw[17]}]
set_property -dict {PACKAGE_PIN N3 IOSTANDARD LVCMOS33} [get_ports {dip_sw[18]}]
set_property -dict {PACKAGE_PIN L4 IOSTANDARD LVCMOS33} [get_ports {dip_sw[19]}]
set_property -dict {PACKAGE_PIN M4 IOSTANDARD LVCMOS33} [get_ports {dip_sw[20]}]
set_property -dict {PACKAGE_PIN N2 IOSTANDARD LVCMOS33} [get_ports {dip_sw[21]}]
set_property -dict {PACKAGE_PIN P6 IOSTANDARD LVCMOS33} [get_ports {dip_sw[22]}]
set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVCMOS33} [get_ports {dip_sw[23]}]
set_property -dict {PACKAGE_PIN P5 IOSTANDARD LVCMOS33} [get_ports {dip_sw[24]}]
set_property -dict {PACKAGE_PIN R3 IOSTANDARD LVCMOS33} [get_ports {dip_sw[25]}]
set_property -dict {PACKAGE_PIN T4 IOSTANDARD LVCMOS33} [get_ports {dip_sw[26]}]
set_property -dict {PACKAGE_PIN R1 IOSTANDARD LVCMOS33} [get_ports {dip_sw[27]}]
set_property -dict {PACKAGE_PIN R5 IOSTANDARD LVCMOS33} [get_ports {dip_sw[28]}]
set_property -dict {PACKAGE_PIN T5 IOSTANDARD LVCMOS33} [get_ports {dip_sw[29]}]
set_property -dict {PACKAGE_PIN R6 IOSTANDARD LVCMOS33} [get_ports {dip_sw[30]}]
set_property -dict {PACKAGE_PIN R2 IOSTANDARD LVCMOS33} [get_ports {dip_sw[31]}]

set_property -dict {PACKAGE_PIN C2 IOSTANDARD LVCMOS33} [get_ports {flash_a[0]}]
set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS33} [get_ports {flash_a[1]}]
set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS33} [get_ports {flash_a[2]}]
set_property -dict {PACKAGE_PIN G9 IOSTANDARD LVCMOS33} [get_ports {flash_a[3]}]
set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS33} [get_ports {flash_a[4]}]
set_property -dict {PACKAGE_PIN F8 IOSTANDARD LVCMOS33} [get_ports {flash_a[5]}]
set_property -dict {PACKAGE_PIN G8 IOSTANDARD LVCMOS33} [get_ports {flash_a[6]}]
set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS33} [get_ports {flash_a[7]}]
set_property -dict {PACKAGE_PIN G7 IOSTANDARD LVCMOS33} [get_ports {flash_a[8]}]
set_property -dict {PACKAGE_PIN F7 IOSTANDARD LVCMOS33} [get_ports {flash_a[9]}]
set_property -dict {PACKAGE_PIN E6 IOSTANDARD LVCMOS33} [get_ports {flash_a[10]}]
set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVCMOS33} [get_ports {flash_a[11]}]
set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS33} [get_ports {flash_a[12]}]
set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS33} [get_ports {flash_a[13]}]
set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS33} [get_ports {flash_a[14]}]
set_property -dict {PACKAGE_PIN F4 IOSTANDARD LVCMOS33} [get_ports {flash_a[15]}]
set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS33} [get_ports {flash_a[16]}]
set_property -dict {PACKAGE_PIN G4 IOSTANDARD LVCMOS33} [get_ports {flash_a[17]}]
set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS33} [get_ports {flash_a[18]}]
set_property -dict {PACKAGE_PIN H4 IOSTANDARD LVCMOS33} [get_ports {flash_a[19]}]
set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS33} [get_ports {flash_a[20]}]
set_property -dict {PACKAGE_PIN J4 IOSTANDARD LVCMOS33} [get_ports {flash_a[21]}]
set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS33} [get_ports {flash_a[22]}]

set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVCMOS33} [get_ports {flash_d[0]}]
set_property -dict {PACKAGE_PIN C1 IOSTANDARD LVCMOS33} [get_ports {flash_d[1]}]
set_property -dict {PACKAGE_PIN D1 IOSTANDARD LVCMOS33} [get_ports {flash_d[2]}]
set_property -dict {PACKAGE_PIN E1 IOSTANDARD LVCMOS33} [get_ports {flash_d[3]}]
set_property -dict {PACKAGE_PIN G1 IOSTANDARD LVCMOS33} [get_ports {flash_d[4]}]
set_property -dict {PACKAGE_PIN A2 IOSTANDARD LVCMOS33} [get_ports {flash_d[5]}]
set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS33} [get_ports {flash_d[6]}]
set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS33} [get_ports {flash_d[7]}]
set_property -dict {PACKAGE_PIN D3 IOSTANDARD LVCMOS33} [get_ports {flash_d[8]}]
set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVCMOS33} [get_ports {flash_d[9]}]
set_property -dict {PACKAGE_PIN F3 IOSTANDARD LVCMOS33} [get_ports {flash_d[10]}]
set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVCMOS33} [get_ports {flash_d[11]}]
set_property -dict {PACKAGE_PIN G2 IOSTANDARD LVCMOS33} [get_ports {flash_d[12]}]
set_property -dict {PACKAGE_PIN B2 IOSTANDARD LVCMOS33} [get_ports {flash_d[13]}]
set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS33} [get_ports {flash_d[14]}]
set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS33} [get_ports {flash_d[15]}]

set_property -dict {PACKAGE_PIN B1 IOSTANDARD LVCMOS33} [get_ports flash_byte_n]
set_property -dict {PACKAGE_PIN E5 IOSTANDARD LVCMOS33} [get_ports flash_ce_n]
set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS33} [get_ports flash_oe_n]
set_property -dict {PACKAGE_PIN G6 IOSTANDARD LVCMOS33} [get_ports flash_rp_n]
set_property -dict {PACKAGE_PIN D5 IOSTANDARD LVCMOS33} [get_ports flash_vpen]
set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS33} [get_ports flash_we_n]

set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[0]}]
set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[1]}]
set_property -dict {PACKAGE_PIN T18 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[2]}]
set_property -dict {PACKAGE_PIN V17 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[3]}]
set_property -dict {PACKAGE_PIN U17 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[4]}]
set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[5]}]
set_property -dict {PACKAGE_PIN R23 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[6]}]
set_property -dict {PACKAGE_PIN T23 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[7]}]
set_property -dict {PACKAGE_PIN U22 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[8]}]
set_property -dict {PACKAGE_PIN Y22 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[9]}]
set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[10]}]
set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[11]}]
set_property -dict {PACKAGE_PIN Y21 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[12]}]
set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[13]}]
set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[14]}]
set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[15]}]
set_property -dict {PACKAGE_PIN W21 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[16]}]
set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[17]}]
set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[18]}]
set_property -dict {PACKAGE_PIN V19 IOSTANDARD LVCMOS33} [get_ports {base_ram_addr[19]}]
set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS33} [get_ports {base_ram_be_n[1]}]
set_property -dict {PACKAGE_PIN L20 IOSTANDARD LVCMOS33} [get_ports {base_ram_be_n[0]}]
set_property -dict {PACKAGE_PIN K25 IOSTANDARD LVCMOS33} [get_ports {base_ram_be_n[3]}]
set_property -dict {PACKAGE_PIN L23 IOSTANDARD LVCMOS33} [get_ports {base_ram_be_n[2]}]
set_property -dict {PACKAGE_PIN L24 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[0]}]
set_property -dict {PACKAGE_PIN L25 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[1]}]
set_property -dict {PACKAGE_PIN M26 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[2]}]
set_property -dict {PACKAGE_PIN M25 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[3]}]
set_property -dict {PACKAGE_PIN N26 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[4]}]
set_property -dict {PACKAGE_PIN P24 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[5]}]
set_property -dict {PACKAGE_PIN P26 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[6]}]
set_property -dict {PACKAGE_PIN P25 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[7]}]
set_property -dict {PACKAGE_PIN AA24 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[8]}]
set_property -dict {PACKAGE_PIN Y23 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[9]}]
set_property -dict {PACKAGE_PIN V21 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[10]}]
set_property -dict {PACKAGE_PIN W24 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[11]}]
set_property -dict {PACKAGE_PIN W23 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[12]}]
set_property -dict {PACKAGE_PIN V22 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[13]}]
set_property -dict {PACKAGE_PIN V23 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[14]}]
set_property -dict {PACKAGE_PIN U21 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[15]}]
set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[16]}]
set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[17]}]
set_property -dict {PACKAGE_PIN P23 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[18]}]
set_property -dict {PACKAGE_PIN P19 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[19]}]
set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[20]}]
set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[21]}]
set_property -dict {PACKAGE_PIN N24 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[22]}]
set_property -dict {PACKAGE_PIN N21 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[23]}]
set_property -dict {PACKAGE_PIN T22 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[24]}]
set_property -dict {PACKAGE_PIN R22 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[25]}]
set_property -dict {PACKAGE_PIN R21 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[26]}]
set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[27]}]
set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[28]}]
set_property -dict {PACKAGE_PIN N23 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[29]}]
set_property -dict {PACKAGE_PIN M24 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[30]}]
set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS33} [get_ports {base_ram_data[31]}]
set_property -dict {PACKAGE_PIN U19 IOSTANDARD LVCMOS33} [get_ports base_ram_ce_n]
set_property -dict {PACKAGE_PIN T20 IOSTANDARD LVCMOS33} [get_ports base_ram_oe_n]
set_property -dict {PACKAGE_PIN U20 IOSTANDARD LVCMOS33} [get_ports base_ram_we_n]

set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[0]}]
set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[1]}]
set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[2]}]
set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[3]}]
set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[4]}]
set_property -dict {PACKAGE_PIN AC22 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[5]}]
set_property -dict {PACKAGE_PIN Y17 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[6]}]
set_property -dict {PACKAGE_PIN AA18 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[7]}]
set_property -dict {PACKAGE_PIN AA17 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[8]}]
set_property -dict {PACKAGE_PIN Y25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[9]}]
set_property -dict {PACKAGE_PIN AA25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[10]}]
set_property -dict {PACKAGE_PIN AB26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[11]}]
set_property -dict {PACKAGE_PIN AB25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[12]}]
set_property -dict {PACKAGE_PIN AC26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[13]}]
set_property -dict {PACKAGE_PIN AC24 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[14]}]
set_property -dict {PACKAGE_PIN AF17 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[15]}]
set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[16]}]
set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[17]}]
set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[18]}]
set_property -dict {PACKAGE_PIN AF19 IOSTANDARD LVCMOS33} [get_ports {ext_ram_addr[19]}]
set_property -dict {PACKAGE_PIN R25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_be_n[1]}]
set_property -dict {PACKAGE_PIN R26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_be_n[0]}]
set_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS33} [get_ports {ext_ram_be_n[3]}]
set_property -dict {PACKAGE_PIN AD24 IOSTANDARD LVCMOS33} [get_ports {ext_ram_be_n[2]}]
set_property -dict {PACKAGE_PIN AF24 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[0]}]
set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[1]}]
set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[2]}]
set_property -dict {PACKAGE_PIN AE22 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[3]}]
set_property -dict {PACKAGE_PIN AF22 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[4]}]
set_property -dict {PACKAGE_PIN AE21 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[5]}]
set_property -dict {PACKAGE_PIN AE20 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[6]}]
set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[7]}]
set_property -dict {PACKAGE_PIN Y26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[8]}]
set_property -dict {PACKAGE_PIN W25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[9]}]
set_property -dict {PACKAGE_PIN W26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[10]}]
set_property -dict {PACKAGE_PIN V24 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[11]}]
set_property -dict {PACKAGE_PIN V26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[12]}]
set_property -dict {PACKAGE_PIN U25 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[13]}]
set_property -dict {PACKAGE_PIN U26 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[14]}]
set_property -dict {PACKAGE_PIN U24 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[15]}]
set_property -dict {PACKAGE_PIN AB16 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[16]}]
set_property -dict {PACKAGE_PIN AC19 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[17]}]
set_property -dict {PACKAGE_PIN AB17 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[18]}]
set_property -dict {PACKAGE_PIN AC18 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[19]}]
set_property -dict {PACKAGE_PIN AD18 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[20]}]
set_property -dict {PACKAGE_PIN AC16 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[21]}]
set_property -dict {PACKAGE_PIN Y15 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[22]}]
set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[23]}]
set_property -dict {PACKAGE_PIN AD17 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[24]}]
set_property -dict {PACKAGE_PIN AC17 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[25]}]
set_property -dict {PACKAGE_PIN AD20 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[26]}]
set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[27]}]
set_property -dict {PACKAGE_PIN AD21 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[28]}]
set_property -dict {PACKAGE_PIN AC21 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[29]}]
set_property -dict {PACKAGE_PIN AA19 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[30]}]
set_property -dict {PACKAGE_PIN AC23 IOSTANDARD LVCMOS33} [get_ports {ext_ram_data[31]}]
set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVCMOS33} [get_ports ext_ram_ce_n]
set_property -dict {PACKAGE_PIN AB19 IOSTANDARD LVCMOS33} [get_ports ext_ram_oe_n]
set_property -dict {PACKAGE_PIN AD19 IOSTANDARD LVCMOS33} [get_ports ext_ram_we_n]

set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]




set_property MARK_DEBUG false [get_nets {GeMIPS_1/pc_reg_1/pc[31]_i_1_n_11}]


connect_debug_port u_ila_0/probe0 [get_nets [list {GeMIPS_1/regfile_1/regs[11]__0[0]} {GeMIPS_1/regfile_1/regs[11]__0[1]} {GeMIPS_1/regfile_1/regs[11]__0[2]} {GeMIPS_1/regfile_1/regs[11]__0[3]} {GeMIPS_1/regfile_1/regs[11]__0[4]} {GeMIPS_1/regfile_1/regs[11]__0[5]} {GeMIPS_1/regfile_1/regs[11]__0[6]} {GeMIPS_1/regfile_1/regs[11]__0[7]} {GeMIPS_1/regfile_1/regs[11]__0[8]} {GeMIPS_1/regfile_1/regs[11]__0[9]} {GeMIPS_1/regfile_1/regs[11]__0[10]} {GeMIPS_1/regfile_1/regs[11]__0[11]} {GeMIPS_1/regfile_1/regs[11]__0[12]} {GeMIPS_1/regfile_1/regs[11]__0[13]} {GeMIPS_1/regfile_1/regs[11]__0[14]} {GeMIPS_1/regfile_1/regs[11]__0[15]} {GeMIPS_1/regfile_1/regs[11]__0[16]} {GeMIPS_1/regfile_1/regs[11]__0[17]} {GeMIPS_1/regfile_1/regs[11]__0[18]} {GeMIPS_1/regfile_1/regs[11]__0[19]} {GeMIPS_1/regfile_1/regs[11]__0[20]} {GeMIPS_1/regfile_1/regs[11]__0[21]} {GeMIPS_1/regfile_1/regs[11]__0[22]} {GeMIPS_1/regfile_1/regs[11]__0[23]} {GeMIPS_1/regfile_1/regs[11]__0[24]} {GeMIPS_1/regfile_1/regs[11]__0[25]} {GeMIPS_1/regfile_1/regs[11]__0[26]} {GeMIPS_1/regfile_1/regs[11]__0[27]} {GeMIPS_1/regfile_1/regs[11]__0[28]} {GeMIPS_1/regfile_1/regs[11]__0[29]} {GeMIPS_1/regfile_1/regs[11]__0[30]} {GeMIPS_1/regfile_1/regs[11]__0[31]}]]
connect_debug_port u_ila_0/probe1 [get_nets [list {GeMIPS_1/regfile_1/regs[14]__0[0]} {GeMIPS_1/regfile_1/regs[14]__0[1]} {GeMIPS_1/regfile_1/regs[14]__0[2]} {GeMIPS_1/regfile_1/regs[14]__0[3]} {GeMIPS_1/regfile_1/regs[14]__0[4]} {GeMIPS_1/regfile_1/regs[14]__0[5]} {GeMIPS_1/regfile_1/regs[14]__0[6]} {GeMIPS_1/regfile_1/regs[14]__0[7]} {GeMIPS_1/regfile_1/regs[14]__0[8]} {GeMIPS_1/regfile_1/regs[14]__0[9]} {GeMIPS_1/regfile_1/regs[14]__0[10]} {GeMIPS_1/regfile_1/regs[14]__0[11]} {GeMIPS_1/regfile_1/regs[14]__0[12]} {GeMIPS_1/regfile_1/regs[14]__0[13]} {GeMIPS_1/regfile_1/regs[14]__0[14]} {GeMIPS_1/regfile_1/regs[14]__0[15]} {GeMIPS_1/regfile_1/regs[14]__0[16]} {GeMIPS_1/regfile_1/regs[14]__0[17]} {GeMIPS_1/regfile_1/regs[14]__0[18]} {GeMIPS_1/regfile_1/regs[14]__0[19]} {GeMIPS_1/regfile_1/regs[14]__0[20]} {GeMIPS_1/regfile_1/regs[14]__0[21]} {GeMIPS_1/regfile_1/regs[14]__0[22]} {GeMIPS_1/regfile_1/regs[14]__0[23]} {GeMIPS_1/regfile_1/regs[14]__0[24]} {GeMIPS_1/regfile_1/regs[14]__0[25]} {GeMIPS_1/regfile_1/regs[14]__0[26]} {GeMIPS_1/regfile_1/regs[14]__0[27]} {GeMIPS_1/regfile_1/regs[14]__0[28]} {GeMIPS_1/regfile_1/regs[14]__0[29]} {GeMIPS_1/regfile_1/regs[14]__0[30]} {GeMIPS_1/regfile_1/regs[14]__0[31]}]]
connect_debug_port u_ila_0/probe2 [get_nets [list {GeMIPS_1/regfile_1/regs[12]__0[0]} {GeMIPS_1/regfile_1/regs[12]__0[1]} {GeMIPS_1/regfile_1/regs[12]__0[2]} {GeMIPS_1/regfile_1/regs[12]__0[3]} {GeMIPS_1/regfile_1/regs[12]__0[4]} {GeMIPS_1/regfile_1/regs[12]__0[5]} {GeMIPS_1/regfile_1/regs[12]__0[6]} {GeMIPS_1/regfile_1/regs[12]__0[7]} {GeMIPS_1/regfile_1/regs[12]__0[8]} {GeMIPS_1/regfile_1/regs[12]__0[9]} {GeMIPS_1/regfile_1/regs[12]__0[10]} {GeMIPS_1/regfile_1/regs[12]__0[11]} {GeMIPS_1/regfile_1/regs[12]__0[12]} {GeMIPS_1/regfile_1/regs[12]__0[13]} {GeMIPS_1/regfile_1/regs[12]__0[14]} {GeMIPS_1/regfile_1/regs[12]__0[15]} {GeMIPS_1/regfile_1/regs[12]__0[16]} {GeMIPS_1/regfile_1/regs[12]__0[17]} {GeMIPS_1/regfile_1/regs[12]__0[18]} {GeMIPS_1/regfile_1/regs[12]__0[19]} {GeMIPS_1/regfile_1/regs[12]__0[20]} {GeMIPS_1/regfile_1/regs[12]__0[21]} {GeMIPS_1/regfile_1/regs[12]__0[22]} {GeMIPS_1/regfile_1/regs[12]__0[23]} {GeMIPS_1/regfile_1/regs[12]__0[24]} {GeMIPS_1/regfile_1/regs[12]__0[25]} {GeMIPS_1/regfile_1/regs[12]__0[26]} {GeMIPS_1/regfile_1/regs[12]__0[27]} {GeMIPS_1/regfile_1/regs[12]__0[28]} {GeMIPS_1/regfile_1/regs[12]__0[29]} {GeMIPS_1/regfile_1/regs[12]__0[30]} {GeMIPS_1/regfile_1/regs[12]__0[31]}]]
connect_debug_port u_ila_0/probe3 [get_nets [list {GeMIPS_1/regfile_1/regs[17]__0[0]} {GeMIPS_1/regfile_1/regs[17]__0[1]} {GeMIPS_1/regfile_1/regs[17]__0[2]} {GeMIPS_1/regfile_1/regs[17]__0[3]} {GeMIPS_1/regfile_1/regs[17]__0[4]} {GeMIPS_1/regfile_1/regs[17]__0[5]} {GeMIPS_1/regfile_1/regs[17]__0[6]} {GeMIPS_1/regfile_1/regs[17]__0[7]} {GeMIPS_1/regfile_1/regs[17]__0[8]} {GeMIPS_1/regfile_1/regs[17]__0[9]} {GeMIPS_1/regfile_1/regs[17]__0[10]} {GeMIPS_1/regfile_1/regs[17]__0[11]} {GeMIPS_1/regfile_1/regs[17]__0[12]} {GeMIPS_1/regfile_1/regs[17]__0[13]} {GeMIPS_1/regfile_1/regs[17]__0[14]} {GeMIPS_1/regfile_1/regs[17]__0[15]} {GeMIPS_1/regfile_1/regs[17]__0[16]} {GeMIPS_1/regfile_1/regs[17]__0[17]} {GeMIPS_1/regfile_1/regs[17]__0[18]} {GeMIPS_1/regfile_1/regs[17]__0[19]} {GeMIPS_1/regfile_1/regs[17]__0[20]} {GeMIPS_1/regfile_1/regs[17]__0[21]} {GeMIPS_1/regfile_1/regs[17]__0[22]} {GeMIPS_1/regfile_1/regs[17]__0[23]} {GeMIPS_1/regfile_1/regs[17]__0[24]} {GeMIPS_1/regfile_1/regs[17]__0[25]} {GeMIPS_1/regfile_1/regs[17]__0[26]} {GeMIPS_1/regfile_1/regs[17]__0[27]} {GeMIPS_1/regfile_1/regs[17]__0[28]} {GeMIPS_1/regfile_1/regs[17]__0[29]} {GeMIPS_1/regfile_1/regs[17]__0[30]} {GeMIPS_1/regfile_1/regs[17]__0[31]}]]
connect_debug_port u_ila_0/probe4 [get_nets [list {GeMIPS_1/regfile_1/regs[23]__0[0]} {GeMIPS_1/regfile_1/regs[23]__0[1]} {GeMIPS_1/regfile_1/regs[23]__0[2]} {GeMIPS_1/regfile_1/regs[23]__0[3]} {GeMIPS_1/regfile_1/regs[23]__0[4]} {GeMIPS_1/regfile_1/regs[23]__0[5]} {GeMIPS_1/regfile_1/regs[23]__0[6]} {GeMIPS_1/regfile_1/regs[23]__0[7]} {GeMIPS_1/regfile_1/regs[23]__0[8]} {GeMIPS_1/regfile_1/regs[23]__0[9]} {GeMIPS_1/regfile_1/regs[23]__0[10]} {GeMIPS_1/regfile_1/regs[23]__0[11]} {GeMIPS_1/regfile_1/regs[23]__0[12]} {GeMIPS_1/regfile_1/regs[23]__0[13]} {GeMIPS_1/regfile_1/regs[23]__0[14]} {GeMIPS_1/regfile_1/regs[23]__0[15]} {GeMIPS_1/regfile_1/regs[23]__0[16]} {GeMIPS_1/regfile_1/regs[23]__0[17]} {GeMIPS_1/regfile_1/regs[23]__0[18]} {GeMIPS_1/regfile_1/regs[23]__0[19]} {GeMIPS_1/regfile_1/regs[23]__0[20]} {GeMIPS_1/regfile_1/regs[23]__0[21]} {GeMIPS_1/regfile_1/regs[23]__0[22]} {GeMIPS_1/regfile_1/regs[23]__0[23]} {GeMIPS_1/regfile_1/regs[23]__0[24]} {GeMIPS_1/regfile_1/regs[23]__0[25]} {GeMIPS_1/regfile_1/regs[23]__0[26]} {GeMIPS_1/regfile_1/regs[23]__0[27]} {GeMIPS_1/regfile_1/regs[23]__0[28]} {GeMIPS_1/regfile_1/regs[23]__0[29]} {GeMIPS_1/regfile_1/regs[23]__0[30]} {GeMIPS_1/regfile_1/regs[23]__0[31]}]]
connect_debug_port u_ila_0/probe5 [get_nets [list {GeMIPS_1/regfile_1/regs[24]__0[0]} {GeMIPS_1/regfile_1/regs[24]__0[1]} {GeMIPS_1/regfile_1/regs[24]__0[2]} {GeMIPS_1/regfile_1/regs[24]__0[3]} {GeMIPS_1/regfile_1/regs[24]__0[4]} {GeMIPS_1/regfile_1/regs[24]__0[5]} {GeMIPS_1/regfile_1/regs[24]__0[6]} {GeMIPS_1/regfile_1/regs[24]__0[7]} {GeMIPS_1/regfile_1/regs[24]__0[8]} {GeMIPS_1/regfile_1/regs[24]__0[9]} {GeMIPS_1/regfile_1/regs[24]__0[10]} {GeMIPS_1/regfile_1/regs[24]__0[11]} {GeMIPS_1/regfile_1/regs[24]__0[12]} {GeMIPS_1/regfile_1/regs[24]__0[13]} {GeMIPS_1/regfile_1/regs[24]__0[14]} {GeMIPS_1/regfile_1/regs[24]__0[15]} {GeMIPS_1/regfile_1/regs[24]__0[16]} {GeMIPS_1/regfile_1/regs[24]__0[17]} {GeMIPS_1/regfile_1/regs[24]__0[18]} {GeMIPS_1/regfile_1/regs[24]__0[19]} {GeMIPS_1/regfile_1/regs[24]__0[20]} {GeMIPS_1/regfile_1/regs[24]__0[21]} {GeMIPS_1/regfile_1/regs[24]__0[22]} {GeMIPS_1/regfile_1/regs[24]__0[23]} {GeMIPS_1/regfile_1/regs[24]__0[24]} {GeMIPS_1/regfile_1/regs[24]__0[25]} {GeMIPS_1/regfile_1/regs[24]__0[26]} {GeMIPS_1/regfile_1/regs[24]__0[27]} {GeMIPS_1/regfile_1/regs[24]__0[28]} {GeMIPS_1/regfile_1/regs[24]__0[29]} {GeMIPS_1/regfile_1/regs[24]__0[30]} {GeMIPS_1/regfile_1/regs[24]__0[31]}]]
connect_debug_port u_ila_0/probe6 [get_nets [list {GeMIPS_1/regfile_1/regs[26]__0[0]} {GeMIPS_1/regfile_1/regs[26]__0[1]} {GeMIPS_1/regfile_1/regs[26]__0[2]} {GeMIPS_1/regfile_1/regs[26]__0[3]} {GeMIPS_1/regfile_1/regs[26]__0[4]} {GeMIPS_1/regfile_1/regs[26]__0[5]} {GeMIPS_1/regfile_1/regs[26]__0[6]} {GeMIPS_1/regfile_1/regs[26]__0[7]} {GeMIPS_1/regfile_1/regs[26]__0[8]} {GeMIPS_1/regfile_1/regs[26]__0[9]} {GeMIPS_1/regfile_1/regs[26]__0[10]} {GeMIPS_1/regfile_1/regs[26]__0[11]} {GeMIPS_1/regfile_1/regs[26]__0[12]} {GeMIPS_1/regfile_1/regs[26]__0[13]} {GeMIPS_1/regfile_1/regs[26]__0[14]} {GeMIPS_1/regfile_1/regs[26]__0[15]} {GeMIPS_1/regfile_1/regs[26]__0[16]} {GeMIPS_1/regfile_1/regs[26]__0[17]} {GeMIPS_1/regfile_1/regs[26]__0[18]} {GeMIPS_1/regfile_1/regs[26]__0[19]} {GeMIPS_1/regfile_1/regs[26]__0[20]} {GeMIPS_1/regfile_1/regs[26]__0[21]} {GeMIPS_1/regfile_1/regs[26]__0[22]} {GeMIPS_1/regfile_1/regs[26]__0[23]} {GeMIPS_1/regfile_1/regs[26]__0[24]} {GeMIPS_1/regfile_1/regs[26]__0[25]} {GeMIPS_1/regfile_1/regs[26]__0[26]} {GeMIPS_1/regfile_1/regs[26]__0[27]} {GeMIPS_1/regfile_1/regs[26]__0[28]} {GeMIPS_1/regfile_1/regs[26]__0[29]} {GeMIPS_1/regfile_1/regs[26]__0[30]} {GeMIPS_1/regfile_1/regs[26]__0[31]}]]
connect_debug_port u_ila_0/probe7 [get_nets [list {GeMIPS_1/regfile_1/regs[28]__0[0]} {GeMIPS_1/regfile_1/regs[28]__0[1]} {GeMIPS_1/regfile_1/regs[28]__0[2]} {GeMIPS_1/regfile_1/regs[28]__0[3]} {GeMIPS_1/regfile_1/regs[28]__0[4]} {GeMIPS_1/regfile_1/regs[28]__0[5]} {GeMIPS_1/regfile_1/regs[28]__0[6]} {GeMIPS_1/regfile_1/regs[28]__0[7]} {GeMIPS_1/regfile_1/regs[28]__0[8]} {GeMIPS_1/regfile_1/regs[28]__0[9]} {GeMIPS_1/regfile_1/regs[28]__0[10]} {GeMIPS_1/regfile_1/regs[28]__0[11]} {GeMIPS_1/regfile_1/regs[28]__0[12]} {GeMIPS_1/regfile_1/regs[28]__0[13]} {GeMIPS_1/regfile_1/regs[28]__0[14]} {GeMIPS_1/regfile_1/regs[28]__0[15]} {GeMIPS_1/regfile_1/regs[28]__0[16]} {GeMIPS_1/regfile_1/regs[28]__0[17]} {GeMIPS_1/regfile_1/regs[28]__0[18]} {GeMIPS_1/regfile_1/regs[28]__0[19]} {GeMIPS_1/regfile_1/regs[28]__0[20]} {GeMIPS_1/regfile_1/regs[28]__0[21]} {GeMIPS_1/regfile_1/regs[28]__0[22]} {GeMIPS_1/regfile_1/regs[28]__0[23]} {GeMIPS_1/regfile_1/regs[28]__0[24]} {GeMIPS_1/regfile_1/regs[28]__0[25]} {GeMIPS_1/regfile_1/regs[28]__0[26]} {GeMIPS_1/regfile_1/regs[28]__0[27]} {GeMIPS_1/regfile_1/regs[28]__0[28]} {GeMIPS_1/regfile_1/regs[28]__0[29]} {GeMIPS_1/regfile_1/regs[28]__0[30]} {GeMIPS_1/regfile_1/regs[28]__0[31]}]]
connect_debug_port u_ila_0/probe8 [get_nets [list {GeMIPS_1/regfile_1/regs[29]__0[0]} {GeMIPS_1/regfile_1/regs[29]__0[1]} {GeMIPS_1/regfile_1/regs[29]__0[2]} {GeMIPS_1/regfile_1/regs[29]__0[3]} {GeMIPS_1/regfile_1/regs[29]__0[4]} {GeMIPS_1/regfile_1/regs[29]__0[5]} {GeMIPS_1/regfile_1/regs[29]__0[6]} {GeMIPS_1/regfile_1/regs[29]__0[7]} {GeMIPS_1/regfile_1/regs[29]__0[8]} {GeMIPS_1/regfile_1/regs[29]__0[9]} {GeMIPS_1/regfile_1/regs[29]__0[10]} {GeMIPS_1/regfile_1/regs[29]__0[11]} {GeMIPS_1/regfile_1/regs[29]__0[12]} {GeMIPS_1/regfile_1/regs[29]__0[13]} {GeMIPS_1/regfile_1/regs[29]__0[14]} {GeMIPS_1/regfile_1/regs[29]__0[15]} {GeMIPS_1/regfile_1/regs[29]__0[16]} {GeMIPS_1/regfile_1/regs[29]__0[17]} {GeMIPS_1/regfile_1/regs[29]__0[18]} {GeMIPS_1/regfile_1/regs[29]__0[19]} {GeMIPS_1/regfile_1/regs[29]__0[20]} {GeMIPS_1/regfile_1/regs[29]__0[21]} {GeMIPS_1/regfile_1/regs[29]__0[22]} {GeMIPS_1/regfile_1/regs[29]__0[23]} {GeMIPS_1/regfile_1/regs[29]__0[24]} {GeMIPS_1/regfile_1/regs[29]__0[25]} {GeMIPS_1/regfile_1/regs[29]__0[26]} {GeMIPS_1/regfile_1/regs[29]__0[27]} {GeMIPS_1/regfile_1/regs[29]__0[28]} {GeMIPS_1/regfile_1/regs[29]__0[29]} {GeMIPS_1/regfile_1/regs[29]__0[30]} {GeMIPS_1/regfile_1/regs[29]__0[31]}]]
connect_debug_port u_ila_0/probe9 [get_nets [list {GeMIPS_1/regfile_1/regs[13]__0[0]} {GeMIPS_1/regfile_1/regs[13]__0[1]} {GeMIPS_1/regfile_1/regs[13]__0[2]} {GeMIPS_1/regfile_1/regs[13]__0[3]} {GeMIPS_1/regfile_1/regs[13]__0[4]} {GeMIPS_1/regfile_1/regs[13]__0[5]} {GeMIPS_1/regfile_1/regs[13]__0[6]} {GeMIPS_1/regfile_1/regs[13]__0[7]} {GeMIPS_1/regfile_1/regs[13]__0[8]} {GeMIPS_1/regfile_1/regs[13]__0[9]} {GeMIPS_1/regfile_1/regs[13]__0[10]} {GeMIPS_1/regfile_1/regs[13]__0[11]} {GeMIPS_1/regfile_1/regs[13]__0[12]} {GeMIPS_1/regfile_1/regs[13]__0[13]} {GeMIPS_1/regfile_1/regs[13]__0[14]} {GeMIPS_1/regfile_1/regs[13]__0[15]} {GeMIPS_1/regfile_1/regs[13]__0[16]} {GeMIPS_1/regfile_1/regs[13]__0[17]} {GeMIPS_1/regfile_1/regs[13]__0[18]} {GeMIPS_1/regfile_1/regs[13]__0[19]} {GeMIPS_1/regfile_1/regs[13]__0[20]} {GeMIPS_1/regfile_1/regs[13]__0[21]} {GeMIPS_1/regfile_1/regs[13]__0[22]} {GeMIPS_1/regfile_1/regs[13]__0[23]} {GeMIPS_1/regfile_1/regs[13]__0[24]} {GeMIPS_1/regfile_1/regs[13]__0[25]} {GeMIPS_1/regfile_1/regs[13]__0[26]} {GeMIPS_1/regfile_1/regs[13]__0[27]} {GeMIPS_1/regfile_1/regs[13]__0[28]} {GeMIPS_1/regfile_1/regs[13]__0[29]} {GeMIPS_1/regfile_1/regs[13]__0[30]} {GeMIPS_1/regfile_1/regs[13]__0[31]}]]
connect_debug_port u_ila_0/probe10 [get_nets [list {GeMIPS_1/regfile_1/regs[18]__0[0]} {GeMIPS_1/regfile_1/regs[18]__0[1]} {GeMIPS_1/regfile_1/regs[18]__0[2]} {GeMIPS_1/regfile_1/regs[18]__0[3]} {GeMIPS_1/regfile_1/regs[18]__0[4]} {GeMIPS_1/regfile_1/regs[18]__0[5]} {GeMIPS_1/regfile_1/regs[18]__0[6]} {GeMIPS_1/regfile_1/regs[18]__0[7]} {GeMIPS_1/regfile_1/regs[18]__0[8]} {GeMIPS_1/regfile_1/regs[18]__0[9]} {GeMIPS_1/regfile_1/regs[18]__0[10]} {GeMIPS_1/regfile_1/regs[18]__0[11]} {GeMIPS_1/regfile_1/regs[18]__0[12]} {GeMIPS_1/regfile_1/regs[18]__0[13]} {GeMIPS_1/regfile_1/regs[18]__0[14]} {GeMIPS_1/regfile_1/regs[18]__0[15]} {GeMIPS_1/regfile_1/regs[18]__0[16]} {GeMIPS_1/regfile_1/regs[18]__0[17]} {GeMIPS_1/regfile_1/regs[18]__0[18]} {GeMIPS_1/regfile_1/regs[18]__0[19]} {GeMIPS_1/regfile_1/regs[18]__0[20]} {GeMIPS_1/regfile_1/regs[18]__0[21]} {GeMIPS_1/regfile_1/regs[18]__0[22]} {GeMIPS_1/regfile_1/regs[18]__0[23]} {GeMIPS_1/regfile_1/regs[18]__0[24]} {GeMIPS_1/regfile_1/regs[18]__0[25]} {GeMIPS_1/regfile_1/regs[18]__0[26]} {GeMIPS_1/regfile_1/regs[18]__0[27]} {GeMIPS_1/regfile_1/regs[18]__0[28]} {GeMIPS_1/regfile_1/regs[18]__0[29]} {GeMIPS_1/regfile_1/regs[18]__0[30]} {GeMIPS_1/regfile_1/regs[18]__0[31]}]]
connect_debug_port u_ila_0/probe11 [get_nets [list {GeMIPS_1/regfile_1/regs[19]__0[0]} {GeMIPS_1/regfile_1/regs[19]__0[1]} {GeMIPS_1/regfile_1/regs[19]__0[2]} {GeMIPS_1/regfile_1/regs[19]__0[3]} {GeMIPS_1/regfile_1/regs[19]__0[4]} {GeMIPS_1/regfile_1/regs[19]__0[5]} {GeMIPS_1/regfile_1/regs[19]__0[6]} {GeMIPS_1/regfile_1/regs[19]__0[7]} {GeMIPS_1/regfile_1/regs[19]__0[8]} {GeMIPS_1/regfile_1/regs[19]__0[9]} {GeMIPS_1/regfile_1/regs[19]__0[10]} {GeMIPS_1/regfile_1/regs[19]__0[11]} {GeMIPS_1/regfile_1/regs[19]__0[12]} {GeMIPS_1/regfile_1/regs[19]__0[13]} {GeMIPS_1/regfile_1/regs[19]__0[14]} {GeMIPS_1/regfile_1/regs[19]__0[15]} {GeMIPS_1/regfile_1/regs[19]__0[16]} {GeMIPS_1/regfile_1/regs[19]__0[17]} {GeMIPS_1/regfile_1/regs[19]__0[18]} {GeMIPS_1/regfile_1/regs[19]__0[19]} {GeMIPS_1/regfile_1/regs[19]__0[20]} {GeMIPS_1/regfile_1/regs[19]__0[21]} {GeMIPS_1/regfile_1/regs[19]__0[22]} {GeMIPS_1/regfile_1/regs[19]__0[23]} {GeMIPS_1/regfile_1/regs[19]__0[24]} {GeMIPS_1/regfile_1/regs[19]__0[25]} {GeMIPS_1/regfile_1/regs[19]__0[26]} {GeMIPS_1/regfile_1/regs[19]__0[27]} {GeMIPS_1/regfile_1/regs[19]__0[28]} {GeMIPS_1/regfile_1/regs[19]__0[29]} {GeMIPS_1/regfile_1/regs[19]__0[30]} {GeMIPS_1/regfile_1/regs[19]__0[31]}]]
connect_debug_port u_ila_0/probe12 [get_nets [list {GeMIPS_1/regfile_1/regs[1]__0[0]} {GeMIPS_1/regfile_1/regs[1]__0[1]} {GeMIPS_1/regfile_1/regs[1]__0[2]} {GeMIPS_1/regfile_1/regs[1]__0[3]} {GeMIPS_1/regfile_1/regs[1]__0[4]} {GeMIPS_1/regfile_1/regs[1]__0[5]} {GeMIPS_1/regfile_1/regs[1]__0[6]} {GeMIPS_1/regfile_1/regs[1]__0[7]} {GeMIPS_1/regfile_1/regs[1]__0[8]} {GeMIPS_1/regfile_1/regs[1]__0[9]} {GeMIPS_1/regfile_1/regs[1]__0[10]} {GeMIPS_1/regfile_1/regs[1]__0[11]} {GeMIPS_1/regfile_1/regs[1]__0[12]} {GeMIPS_1/regfile_1/regs[1]__0[13]} {GeMIPS_1/regfile_1/regs[1]__0[14]} {GeMIPS_1/regfile_1/regs[1]__0[15]} {GeMIPS_1/regfile_1/regs[1]__0[16]} {GeMIPS_1/regfile_1/regs[1]__0[17]} {GeMIPS_1/regfile_1/regs[1]__0[18]} {GeMIPS_1/regfile_1/regs[1]__0[19]} {GeMIPS_1/regfile_1/regs[1]__0[20]} {GeMIPS_1/regfile_1/regs[1]__0[21]} {GeMIPS_1/regfile_1/regs[1]__0[22]} {GeMIPS_1/regfile_1/regs[1]__0[23]} {GeMIPS_1/regfile_1/regs[1]__0[24]} {GeMIPS_1/regfile_1/regs[1]__0[25]} {GeMIPS_1/regfile_1/regs[1]__0[26]} {GeMIPS_1/regfile_1/regs[1]__0[27]} {GeMIPS_1/regfile_1/regs[1]__0[28]} {GeMIPS_1/regfile_1/regs[1]__0[29]} {GeMIPS_1/regfile_1/regs[1]__0[30]} {GeMIPS_1/regfile_1/regs[1]__0[31]}]]
connect_debug_port u_ila_0/probe13 [get_nets [list {GeMIPS_1/regfile_1/regs[22]__0[0]} {GeMIPS_1/regfile_1/regs[22]__0[1]} {GeMIPS_1/regfile_1/regs[22]__0[2]} {GeMIPS_1/regfile_1/regs[22]__0[3]} {GeMIPS_1/regfile_1/regs[22]__0[4]} {GeMIPS_1/regfile_1/regs[22]__0[5]} {GeMIPS_1/regfile_1/regs[22]__0[6]} {GeMIPS_1/regfile_1/regs[22]__0[7]} {GeMIPS_1/regfile_1/regs[22]__0[8]} {GeMIPS_1/regfile_1/regs[22]__0[9]} {GeMIPS_1/regfile_1/regs[22]__0[10]} {GeMIPS_1/regfile_1/regs[22]__0[11]} {GeMIPS_1/regfile_1/regs[22]__0[12]} {GeMIPS_1/regfile_1/regs[22]__0[13]} {GeMIPS_1/regfile_1/regs[22]__0[14]} {GeMIPS_1/regfile_1/regs[22]__0[15]} {GeMIPS_1/regfile_1/regs[22]__0[16]} {GeMIPS_1/regfile_1/regs[22]__0[17]} {GeMIPS_1/regfile_1/regs[22]__0[18]} {GeMIPS_1/regfile_1/regs[22]__0[19]} {GeMIPS_1/regfile_1/regs[22]__0[20]} {GeMIPS_1/regfile_1/regs[22]__0[21]} {GeMIPS_1/regfile_1/regs[22]__0[22]} {GeMIPS_1/regfile_1/regs[22]__0[23]} {GeMIPS_1/regfile_1/regs[22]__0[24]} {GeMIPS_1/regfile_1/regs[22]__0[25]} {GeMIPS_1/regfile_1/regs[22]__0[26]} {GeMIPS_1/regfile_1/regs[22]__0[27]} {GeMIPS_1/regfile_1/regs[22]__0[28]} {GeMIPS_1/regfile_1/regs[22]__0[29]} {GeMIPS_1/regfile_1/regs[22]__0[30]} {GeMIPS_1/regfile_1/regs[22]__0[31]}]]
connect_debug_port u_ila_0/probe14 [get_nets [list {GeMIPS_1/regfile_1/regs[2]__0[0]} {GeMIPS_1/regfile_1/regs[2]__0[1]} {GeMIPS_1/regfile_1/regs[2]__0[2]} {GeMIPS_1/regfile_1/regs[2]__0[3]} {GeMIPS_1/regfile_1/regs[2]__0[4]} {GeMIPS_1/regfile_1/regs[2]__0[5]} {GeMIPS_1/regfile_1/regs[2]__0[6]} {GeMIPS_1/regfile_1/regs[2]__0[7]} {GeMIPS_1/regfile_1/regs[2]__0[8]} {GeMIPS_1/regfile_1/regs[2]__0[9]} {GeMIPS_1/regfile_1/regs[2]__0[10]} {GeMIPS_1/regfile_1/regs[2]__0[11]} {GeMIPS_1/regfile_1/regs[2]__0[12]} {GeMIPS_1/regfile_1/regs[2]__0[13]} {GeMIPS_1/regfile_1/regs[2]__0[14]} {GeMIPS_1/regfile_1/regs[2]__0[15]} {GeMIPS_1/regfile_1/regs[2]__0[16]} {GeMIPS_1/regfile_1/regs[2]__0[17]} {GeMIPS_1/regfile_1/regs[2]__0[18]} {GeMIPS_1/regfile_1/regs[2]__0[19]} {GeMIPS_1/regfile_1/regs[2]__0[20]} {GeMIPS_1/regfile_1/regs[2]__0[21]} {GeMIPS_1/regfile_1/regs[2]__0[22]} {GeMIPS_1/regfile_1/regs[2]__0[23]} {GeMIPS_1/regfile_1/regs[2]__0[24]} {GeMIPS_1/regfile_1/regs[2]__0[25]} {GeMIPS_1/regfile_1/regs[2]__0[26]} {GeMIPS_1/regfile_1/regs[2]__0[27]} {GeMIPS_1/regfile_1/regs[2]__0[28]} {GeMIPS_1/regfile_1/regs[2]__0[29]} {GeMIPS_1/regfile_1/regs[2]__0[30]} {GeMIPS_1/regfile_1/regs[2]__0[31]}]]
connect_debug_port u_ila_0/probe15 [get_nets [list {GeMIPS_1/regfile_1/regs[15]__0[0]} {GeMIPS_1/regfile_1/regs[15]__0[1]} {GeMIPS_1/regfile_1/regs[15]__0[2]} {GeMIPS_1/regfile_1/regs[15]__0[3]} {GeMIPS_1/regfile_1/regs[15]__0[4]} {GeMIPS_1/regfile_1/regs[15]__0[5]} {GeMIPS_1/regfile_1/regs[15]__0[6]} {GeMIPS_1/regfile_1/regs[15]__0[7]} {GeMIPS_1/regfile_1/regs[15]__0[8]} {GeMIPS_1/regfile_1/regs[15]__0[9]} {GeMIPS_1/regfile_1/regs[15]__0[10]} {GeMIPS_1/regfile_1/regs[15]__0[11]} {GeMIPS_1/regfile_1/regs[15]__0[12]} {GeMIPS_1/regfile_1/regs[15]__0[13]} {GeMIPS_1/regfile_1/regs[15]__0[14]} {GeMIPS_1/regfile_1/regs[15]__0[15]} {GeMIPS_1/regfile_1/regs[15]__0[16]} {GeMIPS_1/regfile_1/regs[15]__0[17]} {GeMIPS_1/regfile_1/regs[15]__0[18]} {GeMIPS_1/regfile_1/regs[15]__0[19]} {GeMIPS_1/regfile_1/regs[15]__0[20]} {GeMIPS_1/regfile_1/regs[15]__0[21]} {GeMIPS_1/regfile_1/regs[15]__0[22]} {GeMIPS_1/regfile_1/regs[15]__0[23]} {GeMIPS_1/regfile_1/regs[15]__0[24]} {GeMIPS_1/regfile_1/regs[15]__0[25]} {GeMIPS_1/regfile_1/regs[15]__0[26]} {GeMIPS_1/regfile_1/regs[15]__0[27]} {GeMIPS_1/regfile_1/regs[15]__0[28]} {GeMIPS_1/regfile_1/regs[15]__0[29]} {GeMIPS_1/regfile_1/regs[15]__0[30]} {GeMIPS_1/regfile_1/regs[15]__0[31]}]]
connect_debug_port u_ila_0/probe16 [get_nets [list {GeMIPS_1/regfile_1/regs[16]__0[0]} {GeMIPS_1/regfile_1/regs[16]__0[1]} {GeMIPS_1/regfile_1/regs[16]__0[2]} {GeMIPS_1/regfile_1/regs[16]__0[3]} {GeMIPS_1/regfile_1/regs[16]__0[4]} {GeMIPS_1/regfile_1/regs[16]__0[5]} {GeMIPS_1/regfile_1/regs[16]__0[6]} {GeMIPS_1/regfile_1/regs[16]__0[7]} {GeMIPS_1/regfile_1/regs[16]__0[8]} {GeMIPS_1/regfile_1/regs[16]__0[9]} {GeMIPS_1/regfile_1/regs[16]__0[10]} {GeMIPS_1/regfile_1/regs[16]__0[11]} {GeMIPS_1/regfile_1/regs[16]__0[12]} {GeMIPS_1/regfile_1/regs[16]__0[13]} {GeMIPS_1/regfile_1/regs[16]__0[14]} {GeMIPS_1/regfile_1/regs[16]__0[15]} {GeMIPS_1/regfile_1/regs[16]__0[16]} {GeMIPS_1/regfile_1/regs[16]__0[17]} {GeMIPS_1/regfile_1/regs[16]__0[18]} {GeMIPS_1/regfile_1/regs[16]__0[19]} {GeMIPS_1/regfile_1/regs[16]__0[20]} {GeMIPS_1/regfile_1/regs[16]__0[21]} {GeMIPS_1/regfile_1/regs[16]__0[22]} {GeMIPS_1/regfile_1/regs[16]__0[23]} {GeMIPS_1/regfile_1/regs[16]__0[24]} {GeMIPS_1/regfile_1/regs[16]__0[25]} {GeMIPS_1/regfile_1/regs[16]__0[26]} {GeMIPS_1/regfile_1/regs[16]__0[27]} {GeMIPS_1/regfile_1/regs[16]__0[28]} {GeMIPS_1/regfile_1/regs[16]__0[29]} {GeMIPS_1/regfile_1/regs[16]__0[30]} {GeMIPS_1/regfile_1/regs[16]__0[31]}]]
connect_debug_port u_ila_0/probe17 [get_nets [list {GeMIPS_1/regfile_1/regs[20]__0[0]} {GeMIPS_1/regfile_1/regs[20]__0[1]} {GeMIPS_1/regfile_1/regs[20]__0[2]} {GeMIPS_1/regfile_1/regs[20]__0[3]} {GeMIPS_1/regfile_1/regs[20]__0[4]} {GeMIPS_1/regfile_1/regs[20]__0[5]} {GeMIPS_1/regfile_1/regs[20]__0[6]} {GeMIPS_1/regfile_1/regs[20]__0[7]} {GeMIPS_1/regfile_1/regs[20]__0[8]} {GeMIPS_1/regfile_1/regs[20]__0[9]} {GeMIPS_1/regfile_1/regs[20]__0[10]} {GeMIPS_1/regfile_1/regs[20]__0[11]} {GeMIPS_1/regfile_1/regs[20]__0[12]} {GeMIPS_1/regfile_1/regs[20]__0[13]} {GeMIPS_1/regfile_1/regs[20]__0[14]} {GeMIPS_1/regfile_1/regs[20]__0[15]} {GeMIPS_1/regfile_1/regs[20]__0[16]} {GeMIPS_1/regfile_1/regs[20]__0[17]} {GeMIPS_1/regfile_1/regs[20]__0[18]} {GeMIPS_1/regfile_1/regs[20]__0[19]} {GeMIPS_1/regfile_1/regs[20]__0[20]} {GeMIPS_1/regfile_1/regs[20]__0[21]} {GeMIPS_1/regfile_1/regs[20]__0[22]} {GeMIPS_1/regfile_1/regs[20]__0[23]} {GeMIPS_1/regfile_1/regs[20]__0[24]} {GeMIPS_1/regfile_1/regs[20]__0[25]} {GeMIPS_1/regfile_1/regs[20]__0[26]} {GeMIPS_1/regfile_1/regs[20]__0[27]} {GeMIPS_1/regfile_1/regs[20]__0[28]} {GeMIPS_1/regfile_1/regs[20]__0[29]} {GeMIPS_1/regfile_1/regs[20]__0[30]} {GeMIPS_1/regfile_1/regs[20]__0[31]}]]
connect_debug_port u_ila_0/probe18 [get_nets [list {GeMIPS_1/regfile_1/regs[21]__0[0]} {GeMIPS_1/regfile_1/regs[21]__0[1]} {GeMIPS_1/regfile_1/regs[21]__0[2]} {GeMIPS_1/regfile_1/regs[21]__0[3]} {GeMIPS_1/regfile_1/regs[21]__0[4]} {GeMIPS_1/regfile_1/regs[21]__0[5]} {GeMIPS_1/regfile_1/regs[21]__0[6]} {GeMIPS_1/regfile_1/regs[21]__0[7]} {GeMIPS_1/regfile_1/regs[21]__0[8]} {GeMIPS_1/regfile_1/regs[21]__0[9]} {GeMIPS_1/regfile_1/regs[21]__0[10]} {GeMIPS_1/regfile_1/regs[21]__0[11]} {GeMIPS_1/regfile_1/regs[21]__0[12]} {GeMIPS_1/regfile_1/regs[21]__0[13]} {GeMIPS_1/regfile_1/regs[21]__0[14]} {GeMIPS_1/regfile_1/regs[21]__0[15]} {GeMIPS_1/regfile_1/regs[21]__0[16]} {GeMIPS_1/regfile_1/regs[21]__0[17]} {GeMIPS_1/regfile_1/regs[21]__0[18]} {GeMIPS_1/regfile_1/regs[21]__0[19]} {GeMIPS_1/regfile_1/regs[21]__0[20]} {GeMIPS_1/regfile_1/regs[21]__0[21]} {GeMIPS_1/regfile_1/regs[21]__0[22]} {GeMIPS_1/regfile_1/regs[21]__0[23]} {GeMIPS_1/regfile_1/regs[21]__0[24]} {GeMIPS_1/regfile_1/regs[21]__0[25]} {GeMIPS_1/regfile_1/regs[21]__0[26]} {GeMIPS_1/regfile_1/regs[21]__0[27]} {GeMIPS_1/regfile_1/regs[21]__0[28]} {GeMIPS_1/regfile_1/regs[21]__0[29]} {GeMIPS_1/regfile_1/regs[21]__0[30]} {GeMIPS_1/regfile_1/regs[21]__0[31]}]]
connect_debug_port u_ila_0/probe19 [get_nets [list {GeMIPS_1/regfile_1/regs[25]__0[0]} {GeMIPS_1/regfile_1/regs[25]__0[1]} {GeMIPS_1/regfile_1/regs[25]__0[2]} {GeMIPS_1/regfile_1/regs[25]__0[3]} {GeMIPS_1/regfile_1/regs[25]__0[4]} {GeMIPS_1/regfile_1/regs[25]__0[5]} {GeMIPS_1/regfile_1/regs[25]__0[6]} {GeMIPS_1/regfile_1/regs[25]__0[7]} {GeMIPS_1/regfile_1/regs[25]__0[8]} {GeMIPS_1/regfile_1/regs[25]__0[9]} {GeMIPS_1/regfile_1/regs[25]__0[10]} {GeMIPS_1/regfile_1/regs[25]__0[11]} {GeMIPS_1/regfile_1/regs[25]__0[12]} {GeMIPS_1/regfile_1/regs[25]__0[13]} {GeMIPS_1/regfile_1/regs[25]__0[14]} {GeMIPS_1/regfile_1/regs[25]__0[15]} {GeMIPS_1/regfile_1/regs[25]__0[16]} {GeMIPS_1/regfile_1/regs[25]__0[17]} {GeMIPS_1/regfile_1/regs[25]__0[18]} {GeMIPS_1/regfile_1/regs[25]__0[19]} {GeMIPS_1/regfile_1/regs[25]__0[20]} {GeMIPS_1/regfile_1/regs[25]__0[21]} {GeMIPS_1/regfile_1/regs[25]__0[22]} {GeMIPS_1/regfile_1/regs[25]__0[23]} {GeMIPS_1/regfile_1/regs[25]__0[24]} {GeMIPS_1/regfile_1/regs[25]__0[25]} {GeMIPS_1/regfile_1/regs[25]__0[26]} {GeMIPS_1/regfile_1/regs[25]__0[27]} {GeMIPS_1/regfile_1/regs[25]__0[28]} {GeMIPS_1/regfile_1/regs[25]__0[29]} {GeMIPS_1/regfile_1/regs[25]__0[30]} {GeMIPS_1/regfile_1/regs[25]__0[31]}]]
connect_debug_port u_ila_0/probe20 [get_nets [list {GeMIPS_1/regfile_1/regs[27]__0[0]} {GeMIPS_1/regfile_1/regs[27]__0[1]} {GeMIPS_1/regfile_1/regs[27]__0[2]} {GeMIPS_1/regfile_1/regs[27]__0[3]} {GeMIPS_1/regfile_1/regs[27]__0[4]} {GeMIPS_1/regfile_1/regs[27]__0[5]} {GeMIPS_1/regfile_1/regs[27]__0[6]} {GeMIPS_1/regfile_1/regs[27]__0[7]} {GeMIPS_1/regfile_1/regs[27]__0[8]} {GeMIPS_1/regfile_1/regs[27]__0[9]} {GeMIPS_1/regfile_1/regs[27]__0[10]} {GeMIPS_1/regfile_1/regs[27]__0[11]} {GeMIPS_1/regfile_1/regs[27]__0[12]} {GeMIPS_1/regfile_1/regs[27]__0[13]} {GeMIPS_1/regfile_1/regs[27]__0[14]} {GeMIPS_1/regfile_1/regs[27]__0[15]} {GeMIPS_1/regfile_1/regs[27]__0[16]} {GeMIPS_1/regfile_1/regs[27]__0[17]} {GeMIPS_1/regfile_1/regs[27]__0[18]} {GeMIPS_1/regfile_1/regs[27]__0[19]} {GeMIPS_1/regfile_1/regs[27]__0[20]} {GeMIPS_1/regfile_1/regs[27]__0[21]} {GeMIPS_1/regfile_1/regs[27]__0[22]} {GeMIPS_1/regfile_1/regs[27]__0[23]} {GeMIPS_1/regfile_1/regs[27]__0[24]} {GeMIPS_1/regfile_1/regs[27]__0[25]} {GeMIPS_1/regfile_1/regs[27]__0[26]} {GeMIPS_1/regfile_1/regs[27]__0[27]} {GeMIPS_1/regfile_1/regs[27]__0[28]} {GeMIPS_1/regfile_1/regs[27]__0[29]} {GeMIPS_1/regfile_1/regs[27]__0[30]} {GeMIPS_1/regfile_1/regs[27]__0[31]}]]
connect_debug_port u_ila_0/probe21 [get_nets [list {GeMIPS_1/regfile_1/regs[0]__0[0]} {GeMIPS_1/regfile_1/regs[0]__0[1]} {GeMIPS_1/regfile_1/regs[0]__0[2]} {GeMIPS_1/regfile_1/regs[0]__0[3]} {GeMIPS_1/regfile_1/regs[0]__0[4]} {GeMIPS_1/regfile_1/regs[0]__0[5]} {GeMIPS_1/regfile_1/regs[0]__0[6]} {GeMIPS_1/regfile_1/regs[0]__0[7]} {GeMIPS_1/regfile_1/regs[0]__0[8]} {GeMIPS_1/regfile_1/regs[0]__0[9]} {GeMIPS_1/regfile_1/regs[0]__0[10]} {GeMIPS_1/regfile_1/regs[0]__0[11]} {GeMIPS_1/regfile_1/regs[0]__0[12]} {GeMIPS_1/regfile_1/regs[0]__0[13]} {GeMIPS_1/regfile_1/regs[0]__0[14]} {GeMIPS_1/regfile_1/regs[0]__0[15]} {GeMIPS_1/regfile_1/regs[0]__0[16]} {GeMIPS_1/regfile_1/regs[0]__0[17]} {GeMIPS_1/regfile_1/regs[0]__0[18]} {GeMIPS_1/regfile_1/regs[0]__0[19]} {GeMIPS_1/regfile_1/regs[0]__0[20]} {GeMIPS_1/regfile_1/regs[0]__0[21]} {GeMIPS_1/regfile_1/regs[0]__0[22]} {GeMIPS_1/regfile_1/regs[0]__0[23]} {GeMIPS_1/regfile_1/regs[0]__0[24]} {GeMIPS_1/regfile_1/regs[0]__0[25]} {GeMIPS_1/regfile_1/regs[0]__0[26]} {GeMIPS_1/regfile_1/regs[0]__0[27]} {GeMIPS_1/regfile_1/regs[0]__0[28]} {GeMIPS_1/regfile_1/regs[0]__0[29]} {GeMIPS_1/regfile_1/regs[0]__0[30]} {GeMIPS_1/regfile_1/regs[0]__0[31]}]]
connect_debug_port u_ila_0/probe22 [get_nets [list {GeMIPS_1/regfile_1/regs[10]__0[0]} {GeMIPS_1/regfile_1/regs[10]__0[1]} {GeMIPS_1/regfile_1/regs[10]__0[2]} {GeMIPS_1/regfile_1/regs[10]__0[3]} {GeMIPS_1/regfile_1/regs[10]__0[4]} {GeMIPS_1/regfile_1/regs[10]__0[5]} {GeMIPS_1/regfile_1/regs[10]__0[6]} {GeMIPS_1/regfile_1/regs[10]__0[7]} {GeMIPS_1/regfile_1/regs[10]__0[8]} {GeMIPS_1/regfile_1/regs[10]__0[9]} {GeMIPS_1/regfile_1/regs[10]__0[10]} {GeMIPS_1/regfile_1/regs[10]__0[11]} {GeMIPS_1/regfile_1/regs[10]__0[12]} {GeMIPS_1/regfile_1/regs[10]__0[13]} {GeMIPS_1/regfile_1/regs[10]__0[14]} {GeMIPS_1/regfile_1/regs[10]__0[15]} {GeMIPS_1/regfile_1/regs[10]__0[16]} {GeMIPS_1/regfile_1/regs[10]__0[17]} {GeMIPS_1/regfile_1/regs[10]__0[18]} {GeMIPS_1/regfile_1/regs[10]__0[19]} {GeMIPS_1/regfile_1/regs[10]__0[20]} {GeMIPS_1/regfile_1/regs[10]__0[21]} {GeMIPS_1/regfile_1/regs[10]__0[22]} {GeMIPS_1/regfile_1/regs[10]__0[23]} {GeMIPS_1/regfile_1/regs[10]__0[24]} {GeMIPS_1/regfile_1/regs[10]__0[25]} {GeMIPS_1/regfile_1/regs[10]__0[26]} {GeMIPS_1/regfile_1/regs[10]__0[27]} {GeMIPS_1/regfile_1/regs[10]__0[28]} {GeMIPS_1/regfile_1/regs[10]__0[29]} {GeMIPS_1/regfile_1/regs[10]__0[30]} {GeMIPS_1/regfile_1/regs[10]__0[31]}]]
connect_debug_port u_ila_0/probe23 [get_nets [list {GeMIPS_1/regfile_1/regs[7]__0[0]} {GeMIPS_1/regfile_1/regs[7]__0[1]} {GeMIPS_1/regfile_1/regs[7]__0[2]} {GeMIPS_1/regfile_1/regs[7]__0[3]} {GeMIPS_1/regfile_1/regs[7]__0[4]} {GeMIPS_1/regfile_1/regs[7]__0[5]} {GeMIPS_1/regfile_1/regs[7]__0[6]} {GeMIPS_1/regfile_1/regs[7]__0[7]} {GeMIPS_1/regfile_1/regs[7]__0[8]} {GeMIPS_1/regfile_1/regs[7]__0[9]} {GeMIPS_1/regfile_1/regs[7]__0[10]} {GeMIPS_1/regfile_1/regs[7]__0[11]} {GeMIPS_1/regfile_1/regs[7]__0[12]} {GeMIPS_1/regfile_1/regs[7]__0[13]} {GeMIPS_1/regfile_1/regs[7]__0[14]} {GeMIPS_1/regfile_1/regs[7]__0[15]} {GeMIPS_1/regfile_1/regs[7]__0[16]} {GeMIPS_1/regfile_1/regs[7]__0[17]} {GeMIPS_1/regfile_1/regs[7]__0[18]} {GeMIPS_1/regfile_1/regs[7]__0[19]} {GeMIPS_1/regfile_1/regs[7]__0[20]} {GeMIPS_1/regfile_1/regs[7]__0[21]} {GeMIPS_1/regfile_1/regs[7]__0[22]} {GeMIPS_1/regfile_1/regs[7]__0[23]} {GeMIPS_1/regfile_1/regs[7]__0[24]} {GeMIPS_1/regfile_1/regs[7]__0[25]} {GeMIPS_1/regfile_1/regs[7]__0[26]} {GeMIPS_1/regfile_1/regs[7]__0[27]} {GeMIPS_1/regfile_1/regs[7]__0[28]} {GeMIPS_1/regfile_1/regs[7]__0[29]} {GeMIPS_1/regfile_1/regs[7]__0[30]} {GeMIPS_1/regfile_1/regs[7]__0[31]}]]
connect_debug_port u_ila_0/probe24 [get_nets [list {GeMIPS_1/regfile_1/regs[30]__0[0]} {GeMIPS_1/regfile_1/regs[30]__0[1]} {GeMIPS_1/regfile_1/regs[30]__0[2]} {GeMIPS_1/regfile_1/regs[30]__0[3]} {GeMIPS_1/regfile_1/regs[30]__0[4]} {GeMIPS_1/regfile_1/regs[30]__0[5]} {GeMIPS_1/regfile_1/regs[30]__0[6]} {GeMIPS_1/regfile_1/regs[30]__0[7]} {GeMIPS_1/regfile_1/regs[30]__0[8]} {GeMIPS_1/regfile_1/regs[30]__0[9]} {GeMIPS_1/regfile_1/regs[30]__0[10]} {GeMIPS_1/regfile_1/regs[30]__0[11]} {GeMIPS_1/regfile_1/regs[30]__0[12]} {GeMIPS_1/regfile_1/regs[30]__0[13]} {GeMIPS_1/regfile_1/regs[30]__0[14]} {GeMIPS_1/regfile_1/regs[30]__0[15]} {GeMIPS_1/regfile_1/regs[30]__0[16]} {GeMIPS_1/regfile_1/regs[30]__0[17]} {GeMIPS_1/regfile_1/regs[30]__0[18]} {GeMIPS_1/regfile_1/regs[30]__0[19]} {GeMIPS_1/regfile_1/regs[30]__0[20]} {GeMIPS_1/regfile_1/regs[30]__0[21]} {GeMIPS_1/regfile_1/regs[30]__0[22]} {GeMIPS_1/regfile_1/regs[30]__0[23]} {GeMIPS_1/regfile_1/regs[30]__0[24]} {GeMIPS_1/regfile_1/regs[30]__0[25]} {GeMIPS_1/regfile_1/regs[30]__0[26]} {GeMIPS_1/regfile_1/regs[30]__0[27]} {GeMIPS_1/regfile_1/regs[30]__0[28]} {GeMIPS_1/regfile_1/regs[30]__0[29]} {GeMIPS_1/regfile_1/regs[30]__0[30]} {GeMIPS_1/regfile_1/regs[30]__0[31]}]]
connect_debug_port u_ila_0/probe25 [get_nets [list {GeMIPS_1/regfile_1/regs[3]__0[0]} {GeMIPS_1/regfile_1/regs[3]__0[1]} {GeMIPS_1/regfile_1/regs[3]__0[2]} {GeMIPS_1/regfile_1/regs[3]__0[3]} {GeMIPS_1/regfile_1/regs[3]__0[4]} {GeMIPS_1/regfile_1/regs[3]__0[5]} {GeMIPS_1/regfile_1/regs[3]__0[6]} {GeMIPS_1/regfile_1/regs[3]__0[7]} {GeMIPS_1/regfile_1/regs[3]__0[8]} {GeMIPS_1/regfile_1/regs[3]__0[9]} {GeMIPS_1/regfile_1/regs[3]__0[10]} {GeMIPS_1/regfile_1/regs[3]__0[11]} {GeMIPS_1/regfile_1/regs[3]__0[12]} {GeMIPS_1/regfile_1/regs[3]__0[13]} {GeMIPS_1/regfile_1/regs[3]__0[14]} {GeMIPS_1/regfile_1/regs[3]__0[15]} {GeMIPS_1/regfile_1/regs[3]__0[16]} {GeMIPS_1/regfile_1/regs[3]__0[17]} {GeMIPS_1/regfile_1/regs[3]__0[18]} {GeMIPS_1/regfile_1/regs[3]__0[19]} {GeMIPS_1/regfile_1/regs[3]__0[20]} {GeMIPS_1/regfile_1/regs[3]__0[21]} {GeMIPS_1/regfile_1/regs[3]__0[22]} {GeMIPS_1/regfile_1/regs[3]__0[23]} {GeMIPS_1/regfile_1/regs[3]__0[24]} {GeMIPS_1/regfile_1/regs[3]__0[25]} {GeMIPS_1/regfile_1/regs[3]__0[26]} {GeMIPS_1/regfile_1/regs[3]__0[27]} {GeMIPS_1/regfile_1/regs[3]__0[28]} {GeMIPS_1/regfile_1/regs[3]__0[29]} {GeMIPS_1/regfile_1/regs[3]__0[30]} {GeMIPS_1/regfile_1/regs[3]__0[31]}]]
connect_debug_port u_ila_0/probe26 [get_nets [list {GeMIPS_1/regfile_1/regs[6]__0[0]} {GeMIPS_1/regfile_1/regs[6]__0[1]} {GeMIPS_1/regfile_1/regs[6]__0[2]} {GeMIPS_1/regfile_1/regs[6]__0[3]} {GeMIPS_1/regfile_1/regs[6]__0[4]} {GeMIPS_1/regfile_1/regs[6]__0[5]} {GeMIPS_1/regfile_1/regs[6]__0[6]} {GeMIPS_1/regfile_1/regs[6]__0[7]} {GeMIPS_1/regfile_1/regs[6]__0[8]} {GeMIPS_1/regfile_1/regs[6]__0[9]} {GeMIPS_1/regfile_1/regs[6]__0[10]} {GeMIPS_1/regfile_1/regs[6]__0[11]} {GeMIPS_1/regfile_1/regs[6]__0[12]} {GeMIPS_1/regfile_1/regs[6]__0[13]} {GeMIPS_1/regfile_1/regs[6]__0[14]} {GeMIPS_1/regfile_1/regs[6]__0[15]} {GeMIPS_1/regfile_1/regs[6]__0[16]} {GeMIPS_1/regfile_1/regs[6]__0[17]} {GeMIPS_1/regfile_1/regs[6]__0[18]} {GeMIPS_1/regfile_1/regs[6]__0[19]} {GeMIPS_1/regfile_1/regs[6]__0[20]} {GeMIPS_1/regfile_1/regs[6]__0[21]} {GeMIPS_1/regfile_1/regs[6]__0[22]} {GeMIPS_1/regfile_1/regs[6]__0[23]} {GeMIPS_1/regfile_1/regs[6]__0[24]} {GeMIPS_1/regfile_1/regs[6]__0[25]} {GeMIPS_1/regfile_1/regs[6]__0[26]} {GeMIPS_1/regfile_1/regs[6]__0[27]} {GeMIPS_1/regfile_1/regs[6]__0[28]} {GeMIPS_1/regfile_1/regs[6]__0[29]} {GeMIPS_1/regfile_1/regs[6]__0[30]} {GeMIPS_1/regfile_1/regs[6]__0[31]}]]
connect_debug_port u_ila_0/probe27 [get_nets [list {GeMIPS_1/regfile_1/regs[31]__0[0]} {GeMIPS_1/regfile_1/regs[31]__0[1]} {GeMIPS_1/regfile_1/regs[31]__0[2]} {GeMIPS_1/regfile_1/regs[31]__0[3]} {GeMIPS_1/regfile_1/regs[31]__0[4]} {GeMIPS_1/regfile_1/regs[31]__0[5]} {GeMIPS_1/regfile_1/regs[31]__0[6]} {GeMIPS_1/regfile_1/regs[31]__0[7]} {GeMIPS_1/regfile_1/regs[31]__0[8]} {GeMIPS_1/regfile_1/regs[31]__0[9]} {GeMIPS_1/regfile_1/regs[31]__0[10]} {GeMIPS_1/regfile_1/regs[31]__0[11]} {GeMIPS_1/regfile_1/regs[31]__0[12]} {GeMIPS_1/regfile_1/regs[31]__0[13]} {GeMIPS_1/regfile_1/regs[31]__0[14]} {GeMIPS_1/regfile_1/regs[31]__0[15]} {GeMIPS_1/regfile_1/regs[31]__0[16]} {GeMIPS_1/regfile_1/regs[31]__0[17]} {GeMIPS_1/regfile_1/regs[31]__0[18]} {GeMIPS_1/regfile_1/regs[31]__0[19]} {GeMIPS_1/regfile_1/regs[31]__0[20]} {GeMIPS_1/regfile_1/regs[31]__0[21]} {GeMIPS_1/regfile_1/regs[31]__0[22]} {GeMIPS_1/regfile_1/regs[31]__0[23]} {GeMIPS_1/regfile_1/regs[31]__0[24]} {GeMIPS_1/regfile_1/regs[31]__0[25]} {GeMIPS_1/regfile_1/regs[31]__0[26]} {GeMIPS_1/regfile_1/regs[31]__0[27]} {GeMIPS_1/regfile_1/regs[31]__0[28]} {GeMIPS_1/regfile_1/regs[31]__0[29]} {GeMIPS_1/regfile_1/regs[31]__0[30]} {GeMIPS_1/regfile_1/regs[31]__0[31]}]]
connect_debug_port u_ila_0/probe28 [get_nets [list {GeMIPS_1/regfile_1/regs[5]__0[0]} {GeMIPS_1/regfile_1/regs[5]__0[1]} {GeMIPS_1/regfile_1/regs[5]__0[2]} {GeMIPS_1/regfile_1/regs[5]__0[3]} {GeMIPS_1/regfile_1/regs[5]__0[4]} {GeMIPS_1/regfile_1/regs[5]__0[5]} {GeMIPS_1/regfile_1/regs[5]__0[6]} {GeMIPS_1/regfile_1/regs[5]__0[7]} {GeMIPS_1/regfile_1/regs[5]__0[8]} {GeMIPS_1/regfile_1/regs[5]__0[9]} {GeMIPS_1/regfile_1/regs[5]__0[10]} {GeMIPS_1/regfile_1/regs[5]__0[11]} {GeMIPS_1/regfile_1/regs[5]__0[12]} {GeMIPS_1/regfile_1/regs[5]__0[13]} {GeMIPS_1/regfile_1/regs[5]__0[14]} {GeMIPS_1/regfile_1/regs[5]__0[15]} {GeMIPS_1/regfile_1/regs[5]__0[16]} {GeMIPS_1/regfile_1/regs[5]__0[17]} {GeMIPS_1/regfile_1/regs[5]__0[18]} {GeMIPS_1/regfile_1/regs[5]__0[19]} {GeMIPS_1/regfile_1/regs[5]__0[20]} {GeMIPS_1/regfile_1/regs[5]__0[21]} {GeMIPS_1/regfile_1/regs[5]__0[22]} {GeMIPS_1/regfile_1/regs[5]__0[23]} {GeMIPS_1/regfile_1/regs[5]__0[24]} {GeMIPS_1/regfile_1/regs[5]__0[25]} {GeMIPS_1/regfile_1/regs[5]__0[26]} {GeMIPS_1/regfile_1/regs[5]__0[27]} {GeMIPS_1/regfile_1/regs[5]__0[28]} {GeMIPS_1/regfile_1/regs[5]__0[29]} {GeMIPS_1/regfile_1/regs[5]__0[30]} {GeMIPS_1/regfile_1/regs[5]__0[31]}]]
connect_debug_port u_ila_0/probe29 [get_nets [list {GeMIPS_1/regfile_1/regs[4]__0[0]} {GeMIPS_1/regfile_1/regs[4]__0[1]} {GeMIPS_1/regfile_1/regs[4]__0[2]} {GeMIPS_1/regfile_1/regs[4]__0[3]} {GeMIPS_1/regfile_1/regs[4]__0[4]} {GeMIPS_1/regfile_1/regs[4]__0[5]} {GeMIPS_1/regfile_1/regs[4]__0[6]} {GeMIPS_1/regfile_1/regs[4]__0[7]} {GeMIPS_1/regfile_1/regs[4]__0[8]} {GeMIPS_1/regfile_1/regs[4]__0[9]} {GeMIPS_1/regfile_1/regs[4]__0[10]} {GeMIPS_1/regfile_1/regs[4]__0[11]} {GeMIPS_1/regfile_1/regs[4]__0[12]} {GeMIPS_1/regfile_1/regs[4]__0[13]} {GeMIPS_1/regfile_1/regs[4]__0[14]} {GeMIPS_1/regfile_1/regs[4]__0[15]} {GeMIPS_1/regfile_1/regs[4]__0[16]} {GeMIPS_1/regfile_1/regs[4]__0[17]} {GeMIPS_1/regfile_1/regs[4]__0[18]} {GeMIPS_1/regfile_1/regs[4]__0[19]} {GeMIPS_1/regfile_1/regs[4]__0[20]} {GeMIPS_1/regfile_1/regs[4]__0[21]} {GeMIPS_1/regfile_1/regs[4]__0[22]} {GeMIPS_1/regfile_1/regs[4]__0[23]} {GeMIPS_1/regfile_1/regs[4]__0[24]} {GeMIPS_1/regfile_1/regs[4]__0[25]} {GeMIPS_1/regfile_1/regs[4]__0[26]} {GeMIPS_1/regfile_1/regs[4]__0[27]} {GeMIPS_1/regfile_1/regs[4]__0[28]} {GeMIPS_1/regfile_1/regs[4]__0[29]} {GeMIPS_1/regfile_1/regs[4]__0[30]} {GeMIPS_1/regfile_1/regs[4]__0[31]}]]
connect_debug_port u_ila_0/probe30 [get_nets [list {GeMIPS_1/regfile_1/regs[8]__0[0]} {GeMIPS_1/regfile_1/regs[8]__0[1]} {GeMIPS_1/regfile_1/regs[8]__0[2]} {GeMIPS_1/regfile_1/regs[8]__0[3]} {GeMIPS_1/regfile_1/regs[8]__0[4]} {GeMIPS_1/regfile_1/regs[8]__0[5]} {GeMIPS_1/regfile_1/regs[8]__0[6]} {GeMIPS_1/regfile_1/regs[8]__0[7]} {GeMIPS_1/regfile_1/regs[8]__0[8]} {GeMIPS_1/regfile_1/regs[8]__0[9]} {GeMIPS_1/regfile_1/regs[8]__0[10]} {GeMIPS_1/regfile_1/regs[8]__0[11]} {GeMIPS_1/regfile_1/regs[8]__0[12]} {GeMIPS_1/regfile_1/regs[8]__0[13]} {GeMIPS_1/regfile_1/regs[8]__0[14]} {GeMIPS_1/regfile_1/regs[8]__0[15]} {GeMIPS_1/regfile_1/regs[8]__0[16]} {GeMIPS_1/regfile_1/regs[8]__0[17]} {GeMIPS_1/regfile_1/regs[8]__0[18]} {GeMIPS_1/regfile_1/regs[8]__0[19]} {GeMIPS_1/regfile_1/regs[8]__0[20]} {GeMIPS_1/regfile_1/regs[8]__0[21]} {GeMIPS_1/regfile_1/regs[8]__0[22]} {GeMIPS_1/regfile_1/regs[8]__0[23]} {GeMIPS_1/regfile_1/regs[8]__0[24]} {GeMIPS_1/regfile_1/regs[8]__0[25]} {GeMIPS_1/regfile_1/regs[8]__0[26]} {GeMIPS_1/regfile_1/regs[8]__0[27]} {GeMIPS_1/regfile_1/regs[8]__0[28]} {GeMIPS_1/regfile_1/regs[8]__0[29]} {GeMIPS_1/regfile_1/regs[8]__0[30]} {GeMIPS_1/regfile_1/regs[8]__0[31]}]]
connect_debug_port u_ila_0/probe31 [get_nets [list {GeMIPS_1/regfile_1/regs[9]__0[0]} {GeMIPS_1/regfile_1/regs[9]__0[1]} {GeMIPS_1/regfile_1/regs[9]__0[2]} {GeMIPS_1/regfile_1/regs[9]__0[3]} {GeMIPS_1/regfile_1/regs[9]__0[4]} {GeMIPS_1/regfile_1/regs[9]__0[5]} {GeMIPS_1/regfile_1/regs[9]__0[6]} {GeMIPS_1/regfile_1/regs[9]__0[7]} {GeMIPS_1/regfile_1/regs[9]__0[8]} {GeMIPS_1/regfile_1/regs[9]__0[9]} {GeMIPS_1/regfile_1/regs[9]__0[10]} {GeMIPS_1/regfile_1/regs[9]__0[11]} {GeMIPS_1/regfile_1/regs[9]__0[12]} {GeMIPS_1/regfile_1/regs[9]__0[13]} {GeMIPS_1/regfile_1/regs[9]__0[14]} {GeMIPS_1/regfile_1/regs[9]__0[15]} {GeMIPS_1/regfile_1/regs[9]__0[16]} {GeMIPS_1/regfile_1/regs[9]__0[17]} {GeMIPS_1/regfile_1/regs[9]__0[18]} {GeMIPS_1/regfile_1/regs[9]__0[19]} {GeMIPS_1/regfile_1/regs[9]__0[20]} {GeMIPS_1/regfile_1/regs[9]__0[21]} {GeMIPS_1/regfile_1/regs[9]__0[22]} {GeMIPS_1/regfile_1/regs[9]__0[23]} {GeMIPS_1/regfile_1/regs[9]__0[24]} {GeMIPS_1/regfile_1/regs[9]__0[25]} {GeMIPS_1/regfile_1/regs[9]__0[26]} {GeMIPS_1/regfile_1/regs[9]__0[27]} {GeMIPS_1/regfile_1/regs[9]__0[28]} {GeMIPS_1/regfile_1/regs[9]__0[29]} {GeMIPS_1/regfile_1/regs[9]__0[30]} {GeMIPS_1/regfile_1/regs[9]__0[31]}]]



set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets <const0>]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets <const1>]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_addr_OBUF[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_be_n[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_be_n[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_be_n[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_be_n[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets base_ram_ce_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {base_ram_data_IBUF[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets base_ram_oe_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets base_ram_we_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets clk_10M]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets clk_50M]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets clock_btn]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets clock_btn_IBUF]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets clock_btn_IBUF_BUFG]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {dpy1[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_addr_OBUF[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_be_n[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_be_n[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_be_n[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_be_n[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_be_n_OBUF[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets ext_ram_ce_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ext_ram_data[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets ext_ram_oe_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets ext_ram_oe_n_OBUF]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets ext_ram_we_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets ext_ram_we_n_OBUF]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {flash_a[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets flash_byte_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets flash_ce_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets flash_oe_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets flash_rp_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets flash_vpen]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets flash_we_n]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {leds_OBUF[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_addr_o[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_i[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_data_o[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {ram2_sel_o[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets ram2_we_o]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets reset_btn]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets reset_btn_IBUF]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {rom_data_i[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets rxd]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets rxd_IBUF]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[32]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[33]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[34]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[35]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[36]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets txd]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets txd_OBUF]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[0]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[10]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[11]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[12]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[13]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[14]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[15]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[16]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[17]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[18]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[19]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[1]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[20]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[21]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[22]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[23]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[24]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[25]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[26]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[27]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[28]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[29]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[2]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[30]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[31]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[3]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[4]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[5]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[6]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[7]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[8]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_regs[9]__0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_stops_stop]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_blue[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_blue[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets video_clk]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets video_de]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_green[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_green[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_green[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets video_hsync]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_red[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_red[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {video_red[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets video_vsync]
connect_debug_port u_ila_0/probe0 [get_nets [list {GeMIPS_1/regfile_1/regs[14]__0[0]} {GeMIPS_1/regfile_1/regs[14]__0[1]} {GeMIPS_1/regfile_1/regs[14]__0[2]} {GeMIPS_1/regfile_1/regs[14]__0[3]} {GeMIPS_1/regfile_1/regs[14]__0[4]} {GeMIPS_1/regfile_1/regs[14]__0[5]} {GeMIPS_1/regfile_1/regs[14]__0[6]} {GeMIPS_1/regfile_1/regs[14]__0[7]} {GeMIPS_1/regfile_1/regs[14]__0[8]} {GeMIPS_1/regfile_1/regs[14]__0[9]} {GeMIPS_1/regfile_1/regs[14]__0[10]} {GeMIPS_1/regfile_1/regs[14]__0[11]} {GeMIPS_1/regfile_1/regs[14]__0[12]} {GeMIPS_1/regfile_1/regs[14]__0[13]} {GeMIPS_1/regfile_1/regs[14]__0[14]} {GeMIPS_1/regfile_1/regs[14]__0[15]} {GeMIPS_1/regfile_1/regs[14]__0[16]} {GeMIPS_1/regfile_1/regs[14]__0[17]} {GeMIPS_1/regfile_1/regs[14]__0[18]} {GeMIPS_1/regfile_1/regs[14]__0[19]} {GeMIPS_1/regfile_1/regs[14]__0[20]} {GeMIPS_1/regfile_1/regs[14]__0[21]} {GeMIPS_1/regfile_1/regs[14]__0[22]} {GeMIPS_1/regfile_1/regs[14]__0[23]} {GeMIPS_1/regfile_1/regs[14]__0[24]} {GeMIPS_1/regfile_1/regs[14]__0[25]} {GeMIPS_1/regfile_1/regs[14]__0[26]} {GeMIPS_1/regfile_1/regs[14]__0[27]} {GeMIPS_1/regfile_1/regs[14]__0[28]} {GeMIPS_1/regfile_1/regs[14]__0[29]} {GeMIPS_1/regfile_1/regs[14]__0[30]} {GeMIPS_1/regfile_1/regs[14]__0[31]}]]
connect_debug_port u_ila_0/probe1 [get_nets [list {GeMIPS_1/regfile_1/regs[2]__0[0]} {GeMIPS_1/regfile_1/regs[2]__0[1]} {GeMIPS_1/regfile_1/regs[2]__0[2]} {GeMIPS_1/regfile_1/regs[2]__0[3]} {GeMIPS_1/regfile_1/regs[2]__0[4]} {GeMIPS_1/regfile_1/regs[2]__0[5]} {GeMIPS_1/regfile_1/regs[2]__0[6]} {GeMIPS_1/regfile_1/regs[2]__0[7]} {GeMIPS_1/regfile_1/regs[2]__0[8]} {GeMIPS_1/regfile_1/regs[2]__0[9]} {GeMIPS_1/regfile_1/regs[2]__0[10]} {GeMIPS_1/regfile_1/regs[2]__0[11]} {GeMIPS_1/regfile_1/regs[2]__0[12]} {GeMIPS_1/regfile_1/regs[2]__0[13]} {GeMIPS_1/regfile_1/regs[2]__0[14]} {GeMIPS_1/regfile_1/regs[2]__0[15]} {GeMIPS_1/regfile_1/regs[2]__0[16]} {GeMIPS_1/regfile_1/regs[2]__0[17]} {GeMIPS_1/regfile_1/regs[2]__0[18]} {GeMIPS_1/regfile_1/regs[2]__0[19]} {GeMIPS_1/regfile_1/regs[2]__0[20]} {GeMIPS_1/regfile_1/regs[2]__0[21]} {GeMIPS_1/regfile_1/regs[2]__0[22]} {GeMIPS_1/regfile_1/regs[2]__0[23]} {GeMIPS_1/regfile_1/regs[2]__0[24]} {GeMIPS_1/regfile_1/regs[2]__0[25]} {GeMIPS_1/regfile_1/regs[2]__0[26]} {GeMIPS_1/regfile_1/regs[2]__0[27]} {GeMIPS_1/regfile_1/regs[2]__0[28]} {GeMIPS_1/regfile_1/regs[2]__0[29]} {GeMIPS_1/regfile_1/regs[2]__0[30]} {GeMIPS_1/regfile_1/regs[2]__0[31]}]]
connect_debug_port u_ila_0/probe3 [get_nets [list {GeMIPS_1/regfile_1/regs[10]__0[0]} {GeMIPS_1/regfile_1/regs[10]__0[1]} {GeMIPS_1/regfile_1/regs[10]__0[2]} {GeMIPS_1/regfile_1/regs[10]__0[3]} {GeMIPS_1/regfile_1/regs[10]__0[4]} {GeMIPS_1/regfile_1/regs[10]__0[5]} {GeMIPS_1/regfile_1/regs[10]__0[6]} {GeMIPS_1/regfile_1/regs[10]__0[7]} {GeMIPS_1/regfile_1/regs[10]__0[8]} {GeMIPS_1/regfile_1/regs[10]__0[9]} {GeMIPS_1/regfile_1/regs[10]__0[10]} {GeMIPS_1/regfile_1/regs[10]__0[11]} {GeMIPS_1/regfile_1/regs[10]__0[12]} {GeMIPS_1/regfile_1/regs[10]__0[13]} {GeMIPS_1/regfile_1/regs[10]__0[14]} {GeMIPS_1/regfile_1/regs[10]__0[15]} {GeMIPS_1/regfile_1/regs[10]__0[16]} {GeMIPS_1/regfile_1/regs[10]__0[17]} {GeMIPS_1/regfile_1/regs[10]__0[18]} {GeMIPS_1/regfile_1/regs[10]__0[19]} {GeMIPS_1/regfile_1/regs[10]__0[20]} {GeMIPS_1/regfile_1/regs[10]__0[21]} {GeMIPS_1/regfile_1/regs[10]__0[22]} {GeMIPS_1/regfile_1/regs[10]__0[23]} {GeMIPS_1/regfile_1/regs[10]__0[24]} {GeMIPS_1/regfile_1/regs[10]__0[25]} {GeMIPS_1/regfile_1/regs[10]__0[26]} {GeMIPS_1/regfile_1/regs[10]__0[27]} {GeMIPS_1/regfile_1/regs[10]__0[28]} {GeMIPS_1/regfile_1/regs[10]__0[29]} {GeMIPS_1/regfile_1/regs[10]__0[30]} {GeMIPS_1/regfile_1/regs[10]__0[31]}]]
connect_debug_port u_ila_0/probe4 [get_nets [list {GeMIPS_1/regfile_1/regs[20]__0[0]} {GeMIPS_1/regfile_1/regs[20]__0[1]} {GeMIPS_1/regfile_1/regs[20]__0[2]} {GeMIPS_1/regfile_1/regs[20]__0[3]} {GeMIPS_1/regfile_1/regs[20]__0[4]} {GeMIPS_1/regfile_1/regs[20]__0[5]} {GeMIPS_1/regfile_1/regs[20]__0[6]} {GeMIPS_1/regfile_1/regs[20]__0[7]} {GeMIPS_1/regfile_1/regs[20]__0[8]} {GeMIPS_1/regfile_1/regs[20]__0[9]} {GeMIPS_1/regfile_1/regs[20]__0[10]} {GeMIPS_1/regfile_1/regs[20]__0[11]} {GeMIPS_1/regfile_1/regs[20]__0[12]} {GeMIPS_1/regfile_1/regs[20]__0[13]} {GeMIPS_1/regfile_1/regs[20]__0[14]} {GeMIPS_1/regfile_1/regs[20]__0[15]} {GeMIPS_1/regfile_1/regs[20]__0[16]} {GeMIPS_1/regfile_1/regs[20]__0[17]} {GeMIPS_1/regfile_1/regs[20]__0[18]} {GeMIPS_1/regfile_1/regs[20]__0[19]} {GeMIPS_1/regfile_1/regs[20]__0[20]} {GeMIPS_1/regfile_1/regs[20]__0[21]} {GeMIPS_1/regfile_1/regs[20]__0[22]} {GeMIPS_1/regfile_1/regs[20]__0[23]} {GeMIPS_1/regfile_1/regs[20]__0[24]} {GeMIPS_1/regfile_1/regs[20]__0[25]} {GeMIPS_1/regfile_1/regs[20]__0[26]} {GeMIPS_1/regfile_1/regs[20]__0[27]} {GeMIPS_1/regfile_1/regs[20]__0[28]} {GeMIPS_1/regfile_1/regs[20]__0[29]} {GeMIPS_1/regfile_1/regs[20]__0[30]} {GeMIPS_1/regfile_1/regs[20]__0[31]}]]
connect_debug_port u_ila_0/probe5 [get_nets [list {GeMIPS_1/regfile_1/regs[24]__0[0]} {GeMIPS_1/regfile_1/regs[24]__0[1]} {GeMIPS_1/regfile_1/regs[24]__0[2]} {GeMIPS_1/regfile_1/regs[24]__0[3]} {GeMIPS_1/regfile_1/regs[24]__0[4]} {GeMIPS_1/regfile_1/regs[24]__0[5]} {GeMIPS_1/regfile_1/regs[24]__0[6]} {GeMIPS_1/regfile_1/regs[24]__0[7]} {GeMIPS_1/regfile_1/regs[24]__0[8]} {GeMIPS_1/regfile_1/regs[24]__0[9]} {GeMIPS_1/regfile_1/regs[24]__0[10]} {GeMIPS_1/regfile_1/regs[24]__0[11]} {GeMIPS_1/regfile_1/regs[24]__0[12]} {GeMIPS_1/regfile_1/regs[24]__0[13]} {GeMIPS_1/regfile_1/regs[24]__0[14]} {GeMIPS_1/regfile_1/regs[24]__0[15]} {GeMIPS_1/regfile_1/regs[24]__0[16]} {GeMIPS_1/regfile_1/regs[24]__0[17]} {GeMIPS_1/regfile_1/regs[24]__0[18]} {GeMIPS_1/regfile_1/regs[24]__0[19]} {GeMIPS_1/regfile_1/regs[24]__0[20]} {GeMIPS_1/regfile_1/regs[24]__0[21]} {GeMIPS_1/regfile_1/regs[24]__0[22]} {GeMIPS_1/regfile_1/regs[24]__0[23]} {GeMIPS_1/regfile_1/regs[24]__0[24]} {GeMIPS_1/regfile_1/regs[24]__0[25]} {GeMIPS_1/regfile_1/regs[24]__0[26]} {GeMIPS_1/regfile_1/regs[24]__0[27]} {GeMIPS_1/regfile_1/regs[24]__0[28]} {GeMIPS_1/regfile_1/regs[24]__0[29]} {GeMIPS_1/regfile_1/regs[24]__0[30]} {GeMIPS_1/regfile_1/regs[24]__0[31]}]]
connect_debug_port u_ila_0/probe6 [get_nets [list {GeMIPS_1/regfile_1/regs[28]__0[0]} {GeMIPS_1/regfile_1/regs[28]__0[1]} {GeMIPS_1/regfile_1/regs[28]__0[2]} {GeMIPS_1/regfile_1/regs[28]__0[3]} {GeMIPS_1/regfile_1/regs[28]__0[4]} {GeMIPS_1/regfile_1/regs[28]__0[5]} {GeMIPS_1/regfile_1/regs[28]__0[6]} {GeMIPS_1/regfile_1/regs[28]__0[7]} {GeMIPS_1/regfile_1/regs[28]__0[8]} {GeMIPS_1/regfile_1/regs[28]__0[9]} {GeMIPS_1/regfile_1/regs[28]__0[10]} {GeMIPS_1/regfile_1/regs[28]__0[11]} {GeMIPS_1/regfile_1/regs[28]__0[12]} {GeMIPS_1/regfile_1/regs[28]__0[13]} {GeMIPS_1/regfile_1/regs[28]__0[14]} {GeMIPS_1/regfile_1/regs[28]__0[15]} {GeMIPS_1/regfile_1/regs[28]__0[16]} {GeMIPS_1/regfile_1/regs[28]__0[17]} {GeMIPS_1/regfile_1/regs[28]__0[18]} {GeMIPS_1/regfile_1/regs[28]__0[19]} {GeMIPS_1/regfile_1/regs[28]__0[20]} {GeMIPS_1/regfile_1/regs[28]__0[21]} {GeMIPS_1/regfile_1/regs[28]__0[22]} {GeMIPS_1/regfile_1/regs[28]__0[23]} {GeMIPS_1/regfile_1/regs[28]__0[24]} {GeMIPS_1/regfile_1/regs[28]__0[25]} {GeMIPS_1/regfile_1/regs[28]__0[26]} {GeMIPS_1/regfile_1/regs[28]__0[27]} {GeMIPS_1/regfile_1/regs[28]__0[28]} {GeMIPS_1/regfile_1/regs[28]__0[29]} {GeMIPS_1/regfile_1/regs[28]__0[30]} {GeMIPS_1/regfile_1/regs[28]__0[31]}]]
connect_debug_port u_ila_0/probe7 [get_nets [list {GeMIPS_1/regfile_1/regs[6]__0[0]} {GeMIPS_1/regfile_1/regs[6]__0[1]} {GeMIPS_1/regfile_1/regs[6]__0[2]} {GeMIPS_1/regfile_1/regs[6]__0[3]} {GeMIPS_1/regfile_1/regs[6]__0[4]} {GeMIPS_1/regfile_1/regs[6]__0[5]} {GeMIPS_1/regfile_1/regs[6]__0[6]} {GeMIPS_1/regfile_1/regs[6]__0[7]} {GeMIPS_1/regfile_1/regs[6]__0[8]} {GeMIPS_1/regfile_1/regs[6]__0[9]} {GeMIPS_1/regfile_1/regs[6]__0[10]} {GeMIPS_1/regfile_1/regs[6]__0[11]} {GeMIPS_1/regfile_1/regs[6]__0[12]} {GeMIPS_1/regfile_1/regs[6]__0[13]} {GeMIPS_1/regfile_1/regs[6]__0[14]} {GeMIPS_1/regfile_1/regs[6]__0[15]} {GeMIPS_1/regfile_1/regs[6]__0[16]} {GeMIPS_1/regfile_1/regs[6]__0[17]} {GeMIPS_1/regfile_1/regs[6]__0[18]} {GeMIPS_1/regfile_1/regs[6]__0[19]} {GeMIPS_1/regfile_1/regs[6]__0[20]} {GeMIPS_1/regfile_1/regs[6]__0[21]} {GeMIPS_1/regfile_1/regs[6]__0[22]} {GeMIPS_1/regfile_1/regs[6]__0[23]} {GeMIPS_1/regfile_1/regs[6]__0[24]} {GeMIPS_1/regfile_1/regs[6]__0[25]} {GeMIPS_1/regfile_1/regs[6]__0[26]} {GeMIPS_1/regfile_1/regs[6]__0[27]} {GeMIPS_1/regfile_1/regs[6]__0[28]} {GeMIPS_1/regfile_1/regs[6]__0[29]} {GeMIPS_1/regfile_1/regs[6]__0[30]} {GeMIPS_1/regfile_1/regs[6]__0[31]}]]
connect_debug_port u_ila_0/probe8 [get_nets [list {GeMIPS_1/regfile_1/regs[26]__0[0]} {GeMIPS_1/regfile_1/regs[26]__0[1]} {GeMIPS_1/regfile_1/regs[26]__0[2]} {GeMIPS_1/regfile_1/regs[26]__0[3]} {GeMIPS_1/regfile_1/regs[26]__0[4]} {GeMIPS_1/regfile_1/regs[26]__0[5]} {GeMIPS_1/regfile_1/regs[26]__0[6]} {GeMIPS_1/regfile_1/regs[26]__0[7]} {GeMIPS_1/regfile_1/regs[26]__0[8]} {GeMIPS_1/regfile_1/regs[26]__0[9]} {GeMIPS_1/regfile_1/regs[26]__0[10]} {GeMIPS_1/regfile_1/regs[26]__0[11]} {GeMIPS_1/regfile_1/regs[26]__0[12]} {GeMIPS_1/regfile_1/regs[26]__0[13]} {GeMIPS_1/regfile_1/regs[26]__0[14]} {GeMIPS_1/regfile_1/regs[26]__0[15]} {GeMIPS_1/regfile_1/regs[26]__0[16]} {GeMIPS_1/regfile_1/regs[26]__0[17]} {GeMIPS_1/regfile_1/regs[26]__0[18]} {GeMIPS_1/regfile_1/regs[26]__0[19]} {GeMIPS_1/regfile_1/regs[26]__0[20]} {GeMIPS_1/regfile_1/regs[26]__0[21]} {GeMIPS_1/regfile_1/regs[26]__0[22]} {GeMIPS_1/regfile_1/regs[26]__0[23]} {GeMIPS_1/regfile_1/regs[26]__0[24]} {GeMIPS_1/regfile_1/regs[26]__0[25]} {GeMIPS_1/regfile_1/regs[26]__0[26]} {GeMIPS_1/regfile_1/regs[26]__0[27]} {GeMIPS_1/regfile_1/regs[26]__0[28]} {GeMIPS_1/regfile_1/regs[26]__0[29]} {GeMIPS_1/regfile_1/regs[26]__0[30]} {GeMIPS_1/regfile_1/regs[26]__0[31]}]]
connect_debug_port u_ila_0/probe9 [get_nets [list {GeMIPS_1/regfile_1/regs[12]__0[0]} {GeMIPS_1/regfile_1/regs[12]__0[1]} {GeMIPS_1/regfile_1/regs[12]__0[2]} {GeMIPS_1/regfile_1/regs[12]__0[3]} {GeMIPS_1/regfile_1/regs[12]__0[4]} {GeMIPS_1/regfile_1/regs[12]__0[5]} {GeMIPS_1/regfile_1/regs[12]__0[6]} {GeMIPS_1/regfile_1/regs[12]__0[7]} {GeMIPS_1/regfile_1/regs[12]__0[8]} {GeMIPS_1/regfile_1/regs[12]__0[9]} {GeMIPS_1/regfile_1/regs[12]__0[10]} {GeMIPS_1/regfile_1/regs[12]__0[11]} {GeMIPS_1/regfile_1/regs[12]__0[12]} {GeMIPS_1/regfile_1/regs[12]__0[13]} {GeMIPS_1/regfile_1/regs[12]__0[14]} {GeMIPS_1/regfile_1/regs[12]__0[15]} {GeMIPS_1/regfile_1/regs[12]__0[16]} {GeMIPS_1/regfile_1/regs[12]__0[17]} {GeMIPS_1/regfile_1/regs[12]__0[18]} {GeMIPS_1/regfile_1/regs[12]__0[19]} {GeMIPS_1/regfile_1/regs[12]__0[20]} {GeMIPS_1/regfile_1/regs[12]__0[21]} {GeMIPS_1/regfile_1/regs[12]__0[22]} {GeMIPS_1/regfile_1/regs[12]__0[23]} {GeMIPS_1/regfile_1/regs[12]__0[24]} {GeMIPS_1/regfile_1/regs[12]__0[25]} {GeMIPS_1/regfile_1/regs[12]__0[26]} {GeMIPS_1/regfile_1/regs[12]__0[27]} {GeMIPS_1/regfile_1/regs[12]__0[28]} {GeMIPS_1/regfile_1/regs[12]__0[29]} {GeMIPS_1/regfile_1/regs[12]__0[30]} {GeMIPS_1/regfile_1/regs[12]__0[31]}]]
connect_debug_port u_ila_0/probe10 [get_nets [list {GeMIPS_1/regfile_1/regs[31]__0[0]} {GeMIPS_1/regfile_1/regs[31]__0[1]} {GeMIPS_1/regfile_1/regs[31]__0[2]} {GeMIPS_1/regfile_1/regs[31]__0[3]} {GeMIPS_1/regfile_1/regs[31]__0[4]} {GeMIPS_1/regfile_1/regs[31]__0[5]} {GeMIPS_1/regfile_1/regs[31]__0[6]} {GeMIPS_1/regfile_1/regs[31]__0[7]} {GeMIPS_1/regfile_1/regs[31]__0[8]} {GeMIPS_1/regfile_1/regs[31]__0[9]} {GeMIPS_1/regfile_1/regs[31]__0[10]} {GeMIPS_1/regfile_1/regs[31]__0[11]} {GeMIPS_1/regfile_1/regs[31]__0[12]} {GeMIPS_1/regfile_1/regs[31]__0[13]} {GeMIPS_1/regfile_1/regs[31]__0[14]} {GeMIPS_1/regfile_1/regs[31]__0[15]} {GeMIPS_1/regfile_1/regs[31]__0[16]} {GeMIPS_1/regfile_1/regs[31]__0[17]} {GeMIPS_1/regfile_1/regs[31]__0[18]} {GeMIPS_1/regfile_1/regs[31]__0[19]} {GeMIPS_1/regfile_1/regs[31]__0[20]} {GeMIPS_1/regfile_1/regs[31]__0[21]} {GeMIPS_1/regfile_1/regs[31]__0[22]} {GeMIPS_1/regfile_1/regs[31]__0[23]} {GeMIPS_1/regfile_1/regs[31]__0[24]} {GeMIPS_1/regfile_1/regs[31]__0[25]} {GeMIPS_1/regfile_1/regs[31]__0[26]} {GeMIPS_1/regfile_1/regs[31]__0[27]} {GeMIPS_1/regfile_1/regs[31]__0[28]} {GeMIPS_1/regfile_1/regs[31]__0[29]} {GeMIPS_1/regfile_1/regs[31]__0[30]} {GeMIPS_1/regfile_1/regs[31]__0[31]}]]
connect_debug_port u_ila_0/probe11 [get_nets [list {GeMIPS_1/regfile_1/regs[3]__0[0]} {GeMIPS_1/regfile_1/regs[3]__0[1]} {GeMIPS_1/regfile_1/regs[3]__0[2]} {GeMIPS_1/regfile_1/regs[3]__0[3]} {GeMIPS_1/regfile_1/regs[3]__0[4]} {GeMIPS_1/regfile_1/regs[3]__0[5]} {GeMIPS_1/regfile_1/regs[3]__0[6]} {GeMIPS_1/regfile_1/regs[3]__0[7]} {GeMIPS_1/regfile_1/regs[3]__0[8]} {GeMIPS_1/regfile_1/regs[3]__0[9]} {GeMIPS_1/regfile_1/regs[3]__0[10]} {GeMIPS_1/regfile_1/regs[3]__0[11]} {GeMIPS_1/regfile_1/regs[3]__0[12]} {GeMIPS_1/regfile_1/regs[3]__0[13]} {GeMIPS_1/regfile_1/regs[3]__0[14]} {GeMIPS_1/regfile_1/regs[3]__0[15]} {GeMIPS_1/regfile_1/regs[3]__0[16]} {GeMIPS_1/regfile_1/regs[3]__0[17]} {GeMIPS_1/regfile_1/regs[3]__0[18]} {GeMIPS_1/regfile_1/regs[3]__0[19]} {GeMIPS_1/regfile_1/regs[3]__0[20]} {GeMIPS_1/regfile_1/regs[3]__0[21]} {GeMIPS_1/regfile_1/regs[3]__0[22]} {GeMIPS_1/regfile_1/regs[3]__0[23]} {GeMIPS_1/regfile_1/regs[3]__0[24]} {GeMIPS_1/regfile_1/regs[3]__0[25]} {GeMIPS_1/regfile_1/regs[3]__0[26]} {GeMIPS_1/regfile_1/regs[3]__0[27]} {GeMIPS_1/regfile_1/regs[3]__0[28]} {GeMIPS_1/regfile_1/regs[3]__0[29]} {GeMIPS_1/regfile_1/regs[3]__0[30]} {GeMIPS_1/regfile_1/regs[3]__0[31]}]]
connect_debug_port u_ila_0/probe12 [get_nets [list {GeMIPS_1/regfile_1/regs[0]__0[0]} {GeMIPS_1/regfile_1/regs[0]__0[1]} {GeMIPS_1/regfile_1/regs[0]__0[2]} {GeMIPS_1/regfile_1/regs[0]__0[3]} {GeMIPS_1/regfile_1/regs[0]__0[4]} {GeMIPS_1/regfile_1/regs[0]__0[5]} {GeMIPS_1/regfile_1/regs[0]__0[6]} {GeMIPS_1/regfile_1/regs[0]__0[7]} {GeMIPS_1/regfile_1/regs[0]__0[8]} {GeMIPS_1/regfile_1/regs[0]__0[9]} {GeMIPS_1/regfile_1/regs[0]__0[10]} {GeMIPS_1/regfile_1/regs[0]__0[11]} {GeMIPS_1/regfile_1/regs[0]__0[12]} {GeMIPS_1/regfile_1/regs[0]__0[13]} {GeMIPS_1/regfile_1/regs[0]__0[14]} {GeMIPS_1/regfile_1/regs[0]__0[15]} {GeMIPS_1/regfile_1/regs[0]__0[16]} {GeMIPS_1/regfile_1/regs[0]__0[17]} {GeMIPS_1/regfile_1/regs[0]__0[18]} {GeMIPS_1/regfile_1/regs[0]__0[19]} {GeMIPS_1/regfile_1/regs[0]__0[20]} {GeMIPS_1/regfile_1/regs[0]__0[21]} {GeMIPS_1/regfile_1/regs[0]__0[22]} {GeMIPS_1/regfile_1/regs[0]__0[23]} {GeMIPS_1/regfile_1/regs[0]__0[24]} {GeMIPS_1/regfile_1/regs[0]__0[25]} {GeMIPS_1/regfile_1/regs[0]__0[26]} {GeMIPS_1/regfile_1/regs[0]__0[27]} {GeMIPS_1/regfile_1/regs[0]__0[28]} {GeMIPS_1/regfile_1/regs[0]__0[29]} {GeMIPS_1/regfile_1/regs[0]__0[30]} {GeMIPS_1/regfile_1/regs[0]__0[31]}]]
connect_debug_port u_ila_0/probe13 [get_nets [list {GeMIPS_1/regfile_1/regs[23]__0[0]} {GeMIPS_1/regfile_1/regs[23]__0[1]} {GeMIPS_1/regfile_1/regs[23]__0[2]} {GeMIPS_1/regfile_1/regs[23]__0[3]} {GeMIPS_1/regfile_1/regs[23]__0[4]} {GeMIPS_1/regfile_1/regs[23]__0[5]} {GeMIPS_1/regfile_1/regs[23]__0[6]} {GeMIPS_1/regfile_1/regs[23]__0[7]} {GeMIPS_1/regfile_1/regs[23]__0[8]} {GeMIPS_1/regfile_1/regs[23]__0[9]} {GeMIPS_1/regfile_1/regs[23]__0[10]} {GeMIPS_1/regfile_1/regs[23]__0[11]} {GeMIPS_1/regfile_1/regs[23]__0[12]} {GeMIPS_1/regfile_1/regs[23]__0[13]} {GeMIPS_1/regfile_1/regs[23]__0[14]} {GeMIPS_1/regfile_1/regs[23]__0[15]} {GeMIPS_1/regfile_1/regs[23]__0[16]} {GeMIPS_1/regfile_1/regs[23]__0[17]} {GeMIPS_1/regfile_1/regs[23]__0[18]} {GeMIPS_1/regfile_1/regs[23]__0[19]} {GeMIPS_1/regfile_1/regs[23]__0[20]} {GeMIPS_1/regfile_1/regs[23]__0[21]} {GeMIPS_1/regfile_1/regs[23]__0[22]} {GeMIPS_1/regfile_1/regs[23]__0[23]} {GeMIPS_1/regfile_1/regs[23]__0[24]} {GeMIPS_1/regfile_1/regs[23]__0[25]} {GeMIPS_1/regfile_1/regs[23]__0[26]} {GeMIPS_1/regfile_1/regs[23]__0[27]} {GeMIPS_1/regfile_1/regs[23]__0[28]} {GeMIPS_1/regfile_1/regs[23]__0[29]} {GeMIPS_1/regfile_1/regs[23]__0[30]} {GeMIPS_1/regfile_1/regs[23]__0[31]}]]
connect_debug_port u_ila_0/probe14 [get_nets [list {GeMIPS_1/regfile_1/regs[11]__0[0]} {GeMIPS_1/regfile_1/regs[11]__0[1]} {GeMIPS_1/regfile_1/regs[11]__0[2]} {GeMIPS_1/regfile_1/regs[11]__0[3]} {GeMIPS_1/regfile_1/regs[11]__0[4]} {GeMIPS_1/regfile_1/regs[11]__0[5]} {GeMIPS_1/regfile_1/regs[11]__0[6]} {GeMIPS_1/regfile_1/regs[11]__0[7]} {GeMIPS_1/regfile_1/regs[11]__0[8]} {GeMIPS_1/regfile_1/regs[11]__0[9]} {GeMIPS_1/regfile_1/regs[11]__0[10]} {GeMIPS_1/regfile_1/regs[11]__0[11]} {GeMIPS_1/regfile_1/regs[11]__0[12]} {GeMIPS_1/regfile_1/regs[11]__0[13]} {GeMIPS_1/regfile_1/regs[11]__0[14]} {GeMIPS_1/regfile_1/regs[11]__0[15]} {GeMIPS_1/regfile_1/regs[11]__0[16]} {GeMIPS_1/regfile_1/regs[11]__0[17]} {GeMIPS_1/regfile_1/regs[11]__0[18]} {GeMIPS_1/regfile_1/regs[11]__0[19]} {GeMIPS_1/regfile_1/regs[11]__0[20]} {GeMIPS_1/regfile_1/regs[11]__0[21]} {GeMIPS_1/regfile_1/regs[11]__0[22]} {GeMIPS_1/regfile_1/regs[11]__0[23]} {GeMIPS_1/regfile_1/regs[11]__0[24]} {GeMIPS_1/regfile_1/regs[11]__0[25]} {GeMIPS_1/regfile_1/regs[11]__0[26]} {GeMIPS_1/regfile_1/regs[11]__0[27]} {GeMIPS_1/regfile_1/regs[11]__0[28]} {GeMIPS_1/regfile_1/regs[11]__0[29]} {GeMIPS_1/regfile_1/regs[11]__0[30]} {GeMIPS_1/regfile_1/regs[11]__0[31]}]]
connect_debug_port u_ila_0/probe15 [get_nets [list {GeMIPS_1/regfile_1/regs[7]__0[0]} {GeMIPS_1/regfile_1/regs[7]__0[1]} {GeMIPS_1/regfile_1/regs[7]__0[2]} {GeMIPS_1/regfile_1/regs[7]__0[3]} {GeMIPS_1/regfile_1/regs[7]__0[4]} {GeMIPS_1/regfile_1/regs[7]__0[5]} {GeMIPS_1/regfile_1/regs[7]__0[6]} {GeMIPS_1/regfile_1/regs[7]__0[7]} {GeMIPS_1/regfile_1/regs[7]__0[8]} {GeMIPS_1/regfile_1/regs[7]__0[9]} {GeMIPS_1/regfile_1/regs[7]__0[10]} {GeMIPS_1/regfile_1/regs[7]__0[11]} {GeMIPS_1/regfile_1/regs[7]__0[12]} {GeMIPS_1/regfile_1/regs[7]__0[13]} {GeMIPS_1/regfile_1/regs[7]__0[14]} {GeMIPS_1/regfile_1/regs[7]__0[15]} {GeMIPS_1/regfile_1/regs[7]__0[16]} {GeMIPS_1/regfile_1/regs[7]__0[17]} {GeMIPS_1/regfile_1/regs[7]__0[18]} {GeMIPS_1/regfile_1/regs[7]__0[19]} {GeMIPS_1/regfile_1/regs[7]__0[20]} {GeMIPS_1/regfile_1/regs[7]__0[21]} {GeMIPS_1/regfile_1/regs[7]__0[22]} {GeMIPS_1/regfile_1/regs[7]__0[23]} {GeMIPS_1/regfile_1/regs[7]__0[24]} {GeMIPS_1/regfile_1/regs[7]__0[25]} {GeMIPS_1/regfile_1/regs[7]__0[26]} {GeMIPS_1/regfile_1/regs[7]__0[27]} {GeMIPS_1/regfile_1/regs[7]__0[28]} {GeMIPS_1/regfile_1/regs[7]__0[29]} {GeMIPS_1/regfile_1/regs[7]__0[30]} {GeMIPS_1/regfile_1/regs[7]__0[31]}]]
connect_debug_port u_ila_0/probe16 [get_nets [list {GeMIPS_1/regfile_1/regs[4]__0[0]} {GeMIPS_1/regfile_1/regs[4]__0[1]} {GeMIPS_1/regfile_1/regs[4]__0[2]} {GeMIPS_1/regfile_1/regs[4]__0[3]} {GeMIPS_1/regfile_1/regs[4]__0[4]} {GeMIPS_1/regfile_1/regs[4]__0[5]} {GeMIPS_1/regfile_1/regs[4]__0[6]} {GeMIPS_1/regfile_1/regs[4]__0[7]} {GeMIPS_1/regfile_1/regs[4]__0[8]} {GeMIPS_1/regfile_1/regs[4]__0[9]} {GeMIPS_1/regfile_1/regs[4]__0[10]} {GeMIPS_1/regfile_1/regs[4]__0[11]} {GeMIPS_1/regfile_1/regs[4]__0[12]} {GeMIPS_1/regfile_1/regs[4]__0[13]} {GeMIPS_1/regfile_1/regs[4]__0[14]} {GeMIPS_1/regfile_1/regs[4]__0[15]} {GeMIPS_1/regfile_1/regs[4]__0[16]} {GeMIPS_1/regfile_1/regs[4]__0[17]} {GeMIPS_1/regfile_1/regs[4]__0[18]} {GeMIPS_1/regfile_1/regs[4]__0[19]} {GeMIPS_1/regfile_1/regs[4]__0[20]} {GeMIPS_1/regfile_1/regs[4]__0[21]} {GeMIPS_1/regfile_1/regs[4]__0[22]} {GeMIPS_1/regfile_1/regs[4]__0[23]} {GeMIPS_1/regfile_1/regs[4]__0[24]} {GeMIPS_1/regfile_1/regs[4]__0[25]} {GeMIPS_1/regfile_1/regs[4]__0[26]} {GeMIPS_1/regfile_1/regs[4]__0[27]} {GeMIPS_1/regfile_1/regs[4]__0[28]} {GeMIPS_1/regfile_1/regs[4]__0[29]} {GeMIPS_1/regfile_1/regs[4]__0[30]} {GeMIPS_1/regfile_1/regs[4]__0[31]}]]
connect_debug_port u_ila_0/probe17 [get_nets [list {GeMIPS_1/regfile_1/regs[22]__0[0]} {GeMIPS_1/regfile_1/regs[22]__0[1]} {GeMIPS_1/regfile_1/regs[22]__0[2]} {GeMIPS_1/regfile_1/regs[22]__0[3]} {GeMIPS_1/regfile_1/regs[22]__0[4]} {GeMIPS_1/regfile_1/regs[22]__0[5]} {GeMIPS_1/regfile_1/regs[22]__0[6]} {GeMIPS_1/regfile_1/regs[22]__0[7]} {GeMIPS_1/regfile_1/regs[22]__0[8]} {GeMIPS_1/regfile_1/regs[22]__0[9]} {GeMIPS_1/regfile_1/regs[22]__0[10]} {GeMIPS_1/regfile_1/regs[22]__0[11]} {GeMIPS_1/regfile_1/regs[22]__0[12]} {GeMIPS_1/regfile_1/regs[22]__0[13]} {GeMIPS_1/regfile_1/regs[22]__0[14]} {GeMIPS_1/regfile_1/regs[22]__0[15]} {GeMIPS_1/regfile_1/regs[22]__0[16]} {GeMIPS_1/regfile_1/regs[22]__0[17]} {GeMIPS_1/regfile_1/regs[22]__0[18]} {GeMIPS_1/regfile_1/regs[22]__0[19]} {GeMIPS_1/regfile_1/regs[22]__0[20]} {GeMIPS_1/regfile_1/regs[22]__0[21]} {GeMIPS_1/regfile_1/regs[22]__0[22]} {GeMIPS_1/regfile_1/regs[22]__0[23]} {GeMIPS_1/regfile_1/regs[22]__0[24]} {GeMIPS_1/regfile_1/regs[22]__0[25]} {GeMIPS_1/regfile_1/regs[22]__0[26]} {GeMIPS_1/regfile_1/regs[22]__0[27]} {GeMIPS_1/regfile_1/regs[22]__0[28]} {GeMIPS_1/regfile_1/regs[22]__0[29]} {GeMIPS_1/regfile_1/regs[22]__0[30]} {GeMIPS_1/regfile_1/regs[22]__0[31]}]]
connect_debug_port u_ila_0/probe18 [get_nets [list {GeMIPS_1/regfile_1/regs[5]__0[0]} {GeMIPS_1/regfile_1/regs[5]__0[1]} {GeMIPS_1/regfile_1/regs[5]__0[2]} {GeMIPS_1/regfile_1/regs[5]__0[3]} {GeMIPS_1/regfile_1/regs[5]__0[4]} {GeMIPS_1/regfile_1/regs[5]__0[5]} {GeMIPS_1/regfile_1/regs[5]__0[6]} {GeMIPS_1/regfile_1/regs[5]__0[7]} {GeMIPS_1/regfile_1/regs[5]__0[8]} {GeMIPS_1/regfile_1/regs[5]__0[9]} {GeMIPS_1/regfile_1/regs[5]__0[10]} {GeMIPS_1/regfile_1/regs[5]__0[11]} {GeMIPS_1/regfile_1/regs[5]__0[12]} {GeMIPS_1/regfile_1/regs[5]__0[13]} {GeMIPS_1/regfile_1/regs[5]__0[14]} {GeMIPS_1/regfile_1/regs[5]__0[15]} {GeMIPS_1/regfile_1/regs[5]__0[16]} {GeMIPS_1/regfile_1/regs[5]__0[17]} {GeMIPS_1/regfile_1/regs[5]__0[18]} {GeMIPS_1/regfile_1/regs[5]__0[19]} {GeMIPS_1/regfile_1/regs[5]__0[20]} {GeMIPS_1/regfile_1/regs[5]__0[21]} {GeMIPS_1/regfile_1/regs[5]__0[22]} {GeMIPS_1/regfile_1/regs[5]__0[23]} {GeMIPS_1/regfile_1/regs[5]__0[24]} {GeMIPS_1/regfile_1/regs[5]__0[25]} {GeMIPS_1/regfile_1/regs[5]__0[26]} {GeMIPS_1/regfile_1/regs[5]__0[27]} {GeMIPS_1/regfile_1/regs[5]__0[28]} {GeMIPS_1/regfile_1/regs[5]__0[29]} {GeMIPS_1/regfile_1/regs[5]__0[30]} {GeMIPS_1/regfile_1/regs[5]__0[31]}]]
connect_debug_port u_ila_0/probe19 [get_nets [list {GeMIPS_1/regfile_1/regs[8]__0[0]} {GeMIPS_1/regfile_1/regs[8]__0[1]} {GeMIPS_1/regfile_1/regs[8]__0[2]} {GeMIPS_1/regfile_1/regs[8]__0[3]} {GeMIPS_1/regfile_1/regs[8]__0[4]} {GeMIPS_1/regfile_1/regs[8]__0[5]} {GeMIPS_1/regfile_1/regs[8]__0[6]} {GeMIPS_1/regfile_1/regs[8]__0[7]} {GeMIPS_1/regfile_1/regs[8]__0[8]} {GeMIPS_1/regfile_1/regs[8]__0[9]} {GeMIPS_1/regfile_1/regs[8]__0[10]} {GeMIPS_1/regfile_1/regs[8]__0[11]} {GeMIPS_1/regfile_1/regs[8]__0[12]} {GeMIPS_1/regfile_1/regs[8]__0[13]} {GeMIPS_1/regfile_1/regs[8]__0[14]} {GeMIPS_1/regfile_1/regs[8]__0[15]} {GeMIPS_1/regfile_1/regs[8]__0[16]} {GeMIPS_1/regfile_1/regs[8]__0[17]} {GeMIPS_1/regfile_1/regs[8]__0[18]} {GeMIPS_1/regfile_1/regs[8]__0[19]} {GeMIPS_1/regfile_1/regs[8]__0[20]} {GeMIPS_1/regfile_1/regs[8]__0[21]} {GeMIPS_1/regfile_1/regs[8]__0[22]} {GeMIPS_1/regfile_1/regs[8]__0[23]} {GeMIPS_1/regfile_1/regs[8]__0[24]} {GeMIPS_1/regfile_1/regs[8]__0[25]} {GeMIPS_1/regfile_1/regs[8]__0[26]} {GeMIPS_1/regfile_1/regs[8]__0[27]} {GeMIPS_1/regfile_1/regs[8]__0[28]} {GeMIPS_1/regfile_1/regs[8]__0[29]} {GeMIPS_1/regfile_1/regs[8]__0[30]} {GeMIPS_1/regfile_1/regs[8]__0[31]}]]
connect_debug_port u_ila_0/probe20 [get_nets [list {GeMIPS_1/regfile_1/regs[15]__0[0]} {GeMIPS_1/regfile_1/regs[15]__0[1]} {GeMIPS_1/regfile_1/regs[15]__0[2]} {GeMIPS_1/regfile_1/regs[15]__0[3]} {GeMIPS_1/regfile_1/regs[15]__0[4]} {GeMIPS_1/regfile_1/regs[15]__0[5]} {GeMIPS_1/regfile_1/regs[15]__0[6]} {GeMIPS_1/regfile_1/regs[15]__0[7]} {GeMIPS_1/regfile_1/regs[15]__0[8]} {GeMIPS_1/regfile_1/regs[15]__0[9]} {GeMIPS_1/regfile_1/regs[15]__0[10]} {GeMIPS_1/regfile_1/regs[15]__0[11]} {GeMIPS_1/regfile_1/regs[15]__0[12]} {GeMIPS_1/regfile_1/regs[15]__0[13]} {GeMIPS_1/regfile_1/regs[15]__0[14]} {GeMIPS_1/regfile_1/regs[15]__0[15]} {GeMIPS_1/regfile_1/regs[15]__0[16]} {GeMIPS_1/regfile_1/regs[15]__0[17]} {GeMIPS_1/regfile_1/regs[15]__0[18]} {GeMIPS_1/regfile_1/regs[15]__0[19]} {GeMIPS_1/regfile_1/regs[15]__0[20]} {GeMIPS_1/regfile_1/regs[15]__0[21]} {GeMIPS_1/regfile_1/regs[15]__0[22]} {GeMIPS_1/regfile_1/regs[15]__0[23]} {GeMIPS_1/regfile_1/regs[15]__0[24]} {GeMIPS_1/regfile_1/regs[15]__0[25]} {GeMIPS_1/regfile_1/regs[15]__0[26]} {GeMIPS_1/regfile_1/regs[15]__0[27]} {GeMIPS_1/regfile_1/regs[15]__0[28]} {GeMIPS_1/regfile_1/regs[15]__0[29]} {GeMIPS_1/regfile_1/regs[15]__0[30]} {GeMIPS_1/regfile_1/regs[15]__0[31]}]]
connect_debug_port u_ila_0/probe22 [get_nets [list {GeMIPS_1/regfile_1/regs[25]__0[0]} {GeMIPS_1/regfile_1/regs[25]__0[1]} {GeMIPS_1/regfile_1/regs[25]__0[2]} {GeMIPS_1/regfile_1/regs[25]__0[3]} {GeMIPS_1/regfile_1/regs[25]__0[4]} {GeMIPS_1/regfile_1/regs[25]__0[5]} {GeMIPS_1/regfile_1/regs[25]__0[6]} {GeMIPS_1/regfile_1/regs[25]__0[7]} {GeMIPS_1/regfile_1/regs[25]__0[8]} {GeMIPS_1/regfile_1/regs[25]__0[9]} {GeMIPS_1/regfile_1/regs[25]__0[10]} {GeMIPS_1/regfile_1/regs[25]__0[11]} {GeMIPS_1/regfile_1/regs[25]__0[12]} {GeMIPS_1/regfile_1/regs[25]__0[13]} {GeMIPS_1/regfile_1/regs[25]__0[14]} {GeMIPS_1/regfile_1/regs[25]__0[15]} {GeMIPS_1/regfile_1/regs[25]__0[16]} {GeMIPS_1/regfile_1/regs[25]__0[17]} {GeMIPS_1/regfile_1/regs[25]__0[18]} {GeMIPS_1/regfile_1/regs[25]__0[19]} {GeMIPS_1/regfile_1/regs[25]__0[20]} {GeMIPS_1/regfile_1/regs[25]__0[21]} {GeMIPS_1/regfile_1/regs[25]__0[22]} {GeMIPS_1/regfile_1/regs[25]__0[23]} {GeMIPS_1/regfile_1/regs[25]__0[24]} {GeMIPS_1/regfile_1/regs[25]__0[25]} {GeMIPS_1/regfile_1/regs[25]__0[26]} {GeMIPS_1/regfile_1/regs[25]__0[27]} {GeMIPS_1/regfile_1/regs[25]__0[28]} {GeMIPS_1/regfile_1/regs[25]__0[29]} {GeMIPS_1/regfile_1/regs[25]__0[30]} {GeMIPS_1/regfile_1/regs[25]__0[31]}]]
connect_debug_port u_ila_0/probe23 [get_nets [list {GeMIPS_1/regfile_1/regs[27]__0[0]} {GeMIPS_1/regfile_1/regs[27]__0[1]} {GeMIPS_1/regfile_1/regs[27]__0[2]} {GeMIPS_1/regfile_1/regs[27]__0[3]} {GeMIPS_1/regfile_1/regs[27]__0[4]} {GeMIPS_1/regfile_1/regs[27]__0[5]} {GeMIPS_1/regfile_1/regs[27]__0[6]} {GeMIPS_1/regfile_1/regs[27]__0[7]} {GeMIPS_1/regfile_1/regs[27]__0[8]} {GeMIPS_1/regfile_1/regs[27]__0[9]} {GeMIPS_1/regfile_1/regs[27]__0[10]} {GeMIPS_1/regfile_1/regs[27]__0[11]} {GeMIPS_1/regfile_1/regs[27]__0[12]} {GeMIPS_1/regfile_1/regs[27]__0[13]} {GeMIPS_1/regfile_1/regs[27]__0[14]} {GeMIPS_1/regfile_1/regs[27]__0[15]} {GeMIPS_1/regfile_1/regs[27]__0[16]} {GeMIPS_1/regfile_1/regs[27]__0[17]} {GeMIPS_1/regfile_1/regs[27]__0[18]} {GeMIPS_1/regfile_1/regs[27]__0[19]} {GeMIPS_1/regfile_1/regs[27]__0[20]} {GeMIPS_1/regfile_1/regs[27]__0[21]} {GeMIPS_1/regfile_1/regs[27]__0[22]} {GeMIPS_1/regfile_1/regs[27]__0[23]} {GeMIPS_1/regfile_1/regs[27]__0[24]} {GeMIPS_1/regfile_1/regs[27]__0[25]} {GeMIPS_1/regfile_1/regs[27]__0[26]} {GeMIPS_1/regfile_1/regs[27]__0[27]} {GeMIPS_1/regfile_1/regs[27]__0[28]} {GeMIPS_1/regfile_1/regs[27]__0[29]} {GeMIPS_1/regfile_1/regs[27]__0[30]} {GeMIPS_1/regfile_1/regs[27]__0[31]}]]
connect_debug_port u_ila_0/probe24 [get_nets [list {GeMIPS_1/regfile_1/regs[29]__0[0]} {GeMIPS_1/regfile_1/regs[29]__0[1]} {GeMIPS_1/regfile_1/regs[29]__0[2]} {GeMIPS_1/regfile_1/regs[29]__0[3]} {GeMIPS_1/regfile_1/regs[29]__0[4]} {GeMIPS_1/regfile_1/regs[29]__0[5]} {GeMIPS_1/regfile_1/regs[29]__0[6]} {GeMIPS_1/regfile_1/regs[29]__0[7]} {GeMIPS_1/regfile_1/regs[29]__0[8]} {GeMIPS_1/regfile_1/regs[29]__0[9]} {GeMIPS_1/regfile_1/regs[29]__0[10]} {GeMIPS_1/regfile_1/regs[29]__0[11]} {GeMIPS_1/regfile_1/regs[29]__0[12]} {GeMIPS_1/regfile_1/regs[29]__0[13]} {GeMIPS_1/regfile_1/regs[29]__0[14]} {GeMIPS_1/regfile_1/regs[29]__0[15]} {GeMIPS_1/regfile_1/regs[29]__0[16]} {GeMIPS_1/regfile_1/regs[29]__0[17]} {GeMIPS_1/regfile_1/regs[29]__0[18]} {GeMIPS_1/regfile_1/regs[29]__0[19]} {GeMIPS_1/regfile_1/regs[29]__0[20]} {GeMIPS_1/regfile_1/regs[29]__0[21]} {GeMIPS_1/regfile_1/regs[29]__0[22]} {GeMIPS_1/regfile_1/regs[29]__0[23]} {GeMIPS_1/regfile_1/regs[29]__0[24]} {GeMIPS_1/regfile_1/regs[29]__0[25]} {GeMIPS_1/regfile_1/regs[29]__0[26]} {GeMIPS_1/regfile_1/regs[29]__0[27]} {GeMIPS_1/regfile_1/regs[29]__0[28]} {GeMIPS_1/regfile_1/regs[29]__0[29]} {GeMIPS_1/regfile_1/regs[29]__0[30]} {GeMIPS_1/regfile_1/regs[29]__0[31]}]]
connect_debug_port u_ila_0/probe25 [get_nets [list {GeMIPS_1/regfile_1/regs[16]__0[0]} {GeMIPS_1/regfile_1/regs[16]__0[1]} {GeMIPS_1/regfile_1/regs[16]__0[2]} {GeMIPS_1/regfile_1/regs[16]__0[3]} {GeMIPS_1/regfile_1/regs[16]__0[4]} {GeMIPS_1/regfile_1/regs[16]__0[5]} {GeMIPS_1/regfile_1/regs[16]__0[6]} {GeMIPS_1/regfile_1/regs[16]__0[7]} {GeMIPS_1/regfile_1/regs[16]__0[8]} {GeMIPS_1/regfile_1/regs[16]__0[9]} {GeMIPS_1/regfile_1/regs[16]__0[10]} {GeMIPS_1/regfile_1/regs[16]__0[11]} {GeMIPS_1/regfile_1/regs[16]__0[12]} {GeMIPS_1/regfile_1/regs[16]__0[13]} {GeMIPS_1/regfile_1/regs[16]__0[14]} {GeMIPS_1/regfile_1/regs[16]__0[15]} {GeMIPS_1/regfile_1/regs[16]__0[16]} {GeMIPS_1/regfile_1/regs[16]__0[17]} {GeMIPS_1/regfile_1/regs[16]__0[18]} {GeMIPS_1/regfile_1/regs[16]__0[19]} {GeMIPS_1/regfile_1/regs[16]__0[20]} {GeMIPS_1/regfile_1/regs[16]__0[21]} {GeMIPS_1/regfile_1/regs[16]__0[22]} {GeMIPS_1/regfile_1/regs[16]__0[23]} {GeMIPS_1/regfile_1/regs[16]__0[24]} {GeMIPS_1/regfile_1/regs[16]__0[25]} {GeMIPS_1/regfile_1/regs[16]__0[26]} {GeMIPS_1/regfile_1/regs[16]__0[27]} {GeMIPS_1/regfile_1/regs[16]__0[28]} {GeMIPS_1/regfile_1/regs[16]__0[29]} {GeMIPS_1/regfile_1/regs[16]__0[30]} {GeMIPS_1/regfile_1/regs[16]__0[31]}]]
connect_debug_port u_ila_0/probe26 [get_nets [list {GeMIPS_1/regfile_1/regs[18]__0[0]} {GeMIPS_1/regfile_1/regs[18]__0[1]} {GeMIPS_1/regfile_1/regs[18]__0[2]} {GeMIPS_1/regfile_1/regs[18]__0[3]} {GeMIPS_1/regfile_1/regs[18]__0[4]} {GeMIPS_1/regfile_1/regs[18]__0[5]} {GeMIPS_1/regfile_1/regs[18]__0[6]} {GeMIPS_1/regfile_1/regs[18]__0[7]} {GeMIPS_1/regfile_1/regs[18]__0[8]} {GeMIPS_1/regfile_1/regs[18]__0[9]} {GeMIPS_1/regfile_1/regs[18]__0[10]} {GeMIPS_1/regfile_1/regs[18]__0[11]} {GeMIPS_1/regfile_1/regs[18]__0[12]} {GeMIPS_1/regfile_1/regs[18]__0[13]} {GeMIPS_1/regfile_1/regs[18]__0[14]} {GeMIPS_1/regfile_1/regs[18]__0[15]} {GeMIPS_1/regfile_1/regs[18]__0[16]} {GeMIPS_1/regfile_1/regs[18]__0[17]} {GeMIPS_1/regfile_1/regs[18]__0[18]} {GeMIPS_1/regfile_1/regs[18]__0[19]} {GeMIPS_1/regfile_1/regs[18]__0[20]} {GeMIPS_1/regfile_1/regs[18]__0[21]} {GeMIPS_1/regfile_1/regs[18]__0[22]} {GeMIPS_1/regfile_1/regs[18]__0[23]} {GeMIPS_1/regfile_1/regs[18]__0[24]} {GeMIPS_1/regfile_1/regs[18]__0[25]} {GeMIPS_1/regfile_1/regs[18]__0[26]} {GeMIPS_1/regfile_1/regs[18]__0[27]} {GeMIPS_1/regfile_1/regs[18]__0[28]} {GeMIPS_1/regfile_1/regs[18]__0[29]} {GeMIPS_1/regfile_1/regs[18]__0[30]} {GeMIPS_1/regfile_1/regs[18]__0[31]}]]
connect_debug_port u_ila_0/probe27 [get_nets [list {GeMIPS_1/regfile_1/regs[19]__0[0]} {GeMIPS_1/regfile_1/regs[19]__0[1]} {GeMIPS_1/regfile_1/regs[19]__0[2]} {GeMIPS_1/regfile_1/regs[19]__0[3]} {GeMIPS_1/regfile_1/regs[19]__0[4]} {GeMIPS_1/regfile_1/regs[19]__0[5]} {GeMIPS_1/regfile_1/regs[19]__0[6]} {GeMIPS_1/regfile_1/regs[19]__0[7]} {GeMIPS_1/regfile_1/regs[19]__0[8]} {GeMIPS_1/regfile_1/regs[19]__0[9]} {GeMIPS_1/regfile_1/regs[19]__0[10]} {GeMIPS_1/regfile_1/regs[19]__0[11]} {GeMIPS_1/regfile_1/regs[19]__0[12]} {GeMIPS_1/regfile_1/regs[19]__0[13]} {GeMIPS_1/regfile_1/regs[19]__0[14]} {GeMIPS_1/regfile_1/regs[19]__0[15]} {GeMIPS_1/regfile_1/regs[19]__0[16]} {GeMIPS_1/regfile_1/regs[19]__0[17]} {GeMIPS_1/regfile_1/regs[19]__0[18]} {GeMIPS_1/regfile_1/regs[19]__0[19]} {GeMIPS_1/regfile_1/regs[19]__0[20]} {GeMIPS_1/regfile_1/regs[19]__0[21]} {GeMIPS_1/regfile_1/regs[19]__0[22]} {GeMIPS_1/regfile_1/regs[19]__0[23]} {GeMIPS_1/regfile_1/regs[19]__0[24]} {GeMIPS_1/regfile_1/regs[19]__0[25]} {GeMIPS_1/regfile_1/regs[19]__0[26]} {GeMIPS_1/regfile_1/regs[19]__0[27]} {GeMIPS_1/regfile_1/regs[19]__0[28]} {GeMIPS_1/regfile_1/regs[19]__0[29]} {GeMIPS_1/regfile_1/regs[19]__0[30]} {GeMIPS_1/regfile_1/regs[19]__0[31]}]]
connect_debug_port u_ila_0/probe28 [get_nets [list {GeMIPS_1/regfile_1/regs[30]__0[0]} {GeMIPS_1/regfile_1/regs[30]__0[1]} {GeMIPS_1/regfile_1/regs[30]__0[2]} {GeMIPS_1/regfile_1/regs[30]__0[3]} {GeMIPS_1/regfile_1/regs[30]__0[4]} {GeMIPS_1/regfile_1/regs[30]__0[5]} {GeMIPS_1/regfile_1/regs[30]__0[6]} {GeMIPS_1/regfile_1/regs[30]__0[7]} {GeMIPS_1/regfile_1/regs[30]__0[8]} {GeMIPS_1/regfile_1/regs[30]__0[9]} {GeMIPS_1/regfile_1/regs[30]__0[10]} {GeMIPS_1/regfile_1/regs[30]__0[11]} {GeMIPS_1/regfile_1/regs[30]__0[12]} {GeMIPS_1/regfile_1/regs[30]__0[13]} {GeMIPS_1/regfile_1/regs[30]__0[14]} {GeMIPS_1/regfile_1/regs[30]__0[15]} {GeMIPS_1/regfile_1/regs[30]__0[16]} {GeMIPS_1/regfile_1/regs[30]__0[17]} {GeMIPS_1/regfile_1/regs[30]__0[18]} {GeMIPS_1/regfile_1/regs[30]__0[19]} {GeMIPS_1/regfile_1/regs[30]__0[20]} {GeMIPS_1/regfile_1/regs[30]__0[21]} {GeMIPS_1/regfile_1/regs[30]__0[22]} {GeMIPS_1/regfile_1/regs[30]__0[23]} {GeMIPS_1/regfile_1/regs[30]__0[24]} {GeMIPS_1/regfile_1/regs[30]__0[25]} {GeMIPS_1/regfile_1/regs[30]__0[26]} {GeMIPS_1/regfile_1/regs[30]__0[27]} {GeMIPS_1/regfile_1/regs[30]__0[28]} {GeMIPS_1/regfile_1/regs[30]__0[29]} {GeMIPS_1/regfile_1/regs[30]__0[30]} {GeMIPS_1/regfile_1/regs[30]__0[31]}]]
connect_debug_port u_ila_0/probe29 [get_nets [list {GeMIPS_1/regfile_1/regs[13]__0[0]} {GeMIPS_1/regfile_1/regs[13]__0[1]} {GeMIPS_1/regfile_1/regs[13]__0[2]} {GeMIPS_1/regfile_1/regs[13]__0[3]} {GeMIPS_1/regfile_1/regs[13]__0[4]} {GeMIPS_1/regfile_1/regs[13]__0[5]} {GeMIPS_1/regfile_1/regs[13]__0[6]} {GeMIPS_1/regfile_1/regs[13]__0[7]} {GeMIPS_1/regfile_1/regs[13]__0[8]} {GeMIPS_1/regfile_1/regs[13]__0[9]} {GeMIPS_1/regfile_1/regs[13]__0[10]} {GeMIPS_1/regfile_1/regs[13]__0[11]} {GeMIPS_1/regfile_1/regs[13]__0[12]} {GeMIPS_1/regfile_1/regs[13]__0[13]} {GeMIPS_1/regfile_1/regs[13]__0[14]} {GeMIPS_1/regfile_1/regs[13]__0[15]} {GeMIPS_1/regfile_1/regs[13]__0[16]} {GeMIPS_1/regfile_1/regs[13]__0[17]} {GeMIPS_1/regfile_1/regs[13]__0[18]} {GeMIPS_1/regfile_1/regs[13]__0[19]} {GeMIPS_1/regfile_1/regs[13]__0[20]} {GeMIPS_1/regfile_1/regs[13]__0[21]} {GeMIPS_1/regfile_1/regs[13]__0[22]} {GeMIPS_1/regfile_1/regs[13]__0[23]} {GeMIPS_1/regfile_1/regs[13]__0[24]} {GeMIPS_1/regfile_1/regs[13]__0[25]} {GeMIPS_1/regfile_1/regs[13]__0[26]} {GeMIPS_1/regfile_1/regs[13]__0[27]} {GeMIPS_1/regfile_1/regs[13]__0[28]} {GeMIPS_1/regfile_1/regs[13]__0[29]} {GeMIPS_1/regfile_1/regs[13]__0[30]} {GeMIPS_1/regfile_1/regs[13]__0[31]}]]
connect_debug_port u_ila_0/probe30 [get_nets [list {GeMIPS_1/regfile_1/regs[1]__0[0]} {GeMIPS_1/regfile_1/regs[1]__0[1]} {GeMIPS_1/regfile_1/regs[1]__0[2]} {GeMIPS_1/regfile_1/regs[1]__0[3]} {GeMIPS_1/regfile_1/regs[1]__0[4]} {GeMIPS_1/regfile_1/regs[1]__0[5]} {GeMIPS_1/regfile_1/regs[1]__0[6]} {GeMIPS_1/regfile_1/regs[1]__0[7]} {GeMIPS_1/regfile_1/regs[1]__0[8]} {GeMIPS_1/regfile_1/regs[1]__0[9]} {GeMIPS_1/regfile_1/regs[1]__0[10]} {GeMIPS_1/regfile_1/regs[1]__0[11]} {GeMIPS_1/regfile_1/regs[1]__0[12]} {GeMIPS_1/regfile_1/regs[1]__0[13]} {GeMIPS_1/regfile_1/regs[1]__0[14]} {GeMIPS_1/regfile_1/regs[1]__0[15]} {GeMIPS_1/regfile_1/regs[1]__0[16]} {GeMIPS_1/regfile_1/regs[1]__0[17]} {GeMIPS_1/regfile_1/regs[1]__0[18]} {GeMIPS_1/regfile_1/regs[1]__0[19]} {GeMIPS_1/regfile_1/regs[1]__0[20]} {GeMIPS_1/regfile_1/regs[1]__0[21]} {GeMIPS_1/regfile_1/regs[1]__0[22]} {GeMIPS_1/regfile_1/regs[1]__0[23]} {GeMIPS_1/regfile_1/regs[1]__0[24]} {GeMIPS_1/regfile_1/regs[1]__0[25]} {GeMIPS_1/regfile_1/regs[1]__0[26]} {GeMIPS_1/regfile_1/regs[1]__0[27]} {GeMIPS_1/regfile_1/regs[1]__0[28]} {GeMIPS_1/regfile_1/regs[1]__0[29]} {GeMIPS_1/regfile_1/regs[1]__0[30]} {GeMIPS_1/regfile_1/regs[1]__0[31]}]]
connect_debug_port u_ila_0/probe31 [get_nets [list {GeMIPS_1/regfile_1/regs[21]__0[0]} {GeMIPS_1/regfile_1/regs[21]__0[1]} {GeMIPS_1/regfile_1/regs[21]__0[2]} {GeMIPS_1/regfile_1/regs[21]__0[3]} {GeMIPS_1/regfile_1/regs[21]__0[4]} {GeMIPS_1/regfile_1/regs[21]__0[5]} {GeMIPS_1/regfile_1/regs[21]__0[6]} {GeMIPS_1/regfile_1/regs[21]__0[7]} {GeMIPS_1/regfile_1/regs[21]__0[8]} {GeMIPS_1/regfile_1/regs[21]__0[9]} {GeMIPS_1/regfile_1/regs[21]__0[10]} {GeMIPS_1/regfile_1/regs[21]__0[11]} {GeMIPS_1/regfile_1/regs[21]__0[12]} {GeMIPS_1/regfile_1/regs[21]__0[13]} {GeMIPS_1/regfile_1/regs[21]__0[14]} {GeMIPS_1/regfile_1/regs[21]__0[15]} {GeMIPS_1/regfile_1/regs[21]__0[16]} {GeMIPS_1/regfile_1/regs[21]__0[17]} {GeMIPS_1/regfile_1/regs[21]__0[18]} {GeMIPS_1/regfile_1/regs[21]__0[19]} {GeMIPS_1/regfile_1/regs[21]__0[20]} {GeMIPS_1/regfile_1/regs[21]__0[21]} {GeMIPS_1/regfile_1/regs[21]__0[22]} {GeMIPS_1/regfile_1/regs[21]__0[23]} {GeMIPS_1/regfile_1/regs[21]__0[24]} {GeMIPS_1/regfile_1/regs[21]__0[25]} {GeMIPS_1/regfile_1/regs[21]__0[26]} {GeMIPS_1/regfile_1/regs[21]__0[27]} {GeMIPS_1/regfile_1/regs[21]__0[28]} {GeMIPS_1/regfile_1/regs[21]__0[29]} {GeMIPS_1/regfile_1/regs[21]__0[30]} {GeMIPS_1/regfile_1/regs[21]__0[31]}]]
connect_debug_port u_ila_0/probe32 [get_nets [list {GeMIPS_1/regfile_1/regs[9]__0[0]} {GeMIPS_1/regfile_1/regs[9]__0[1]} {GeMIPS_1/regfile_1/regs[9]__0[2]} {GeMIPS_1/regfile_1/regs[9]__0[3]} {GeMIPS_1/regfile_1/regs[9]__0[4]} {GeMIPS_1/regfile_1/regs[9]__0[5]} {GeMIPS_1/regfile_1/regs[9]__0[6]} {GeMIPS_1/regfile_1/regs[9]__0[7]} {GeMIPS_1/regfile_1/regs[9]__0[8]} {GeMIPS_1/regfile_1/regs[9]__0[9]} {GeMIPS_1/regfile_1/regs[9]__0[10]} {GeMIPS_1/regfile_1/regs[9]__0[11]} {GeMIPS_1/regfile_1/regs[9]__0[12]} {GeMIPS_1/regfile_1/regs[9]__0[13]} {GeMIPS_1/regfile_1/regs[9]__0[14]} {GeMIPS_1/regfile_1/regs[9]__0[15]} {GeMIPS_1/regfile_1/regs[9]__0[16]} {GeMIPS_1/regfile_1/regs[9]__0[17]} {GeMIPS_1/regfile_1/regs[9]__0[18]} {GeMIPS_1/regfile_1/regs[9]__0[19]} {GeMIPS_1/regfile_1/regs[9]__0[20]} {GeMIPS_1/regfile_1/regs[9]__0[21]} {GeMIPS_1/regfile_1/regs[9]__0[22]} {GeMIPS_1/regfile_1/regs[9]__0[23]} {GeMIPS_1/regfile_1/regs[9]__0[24]} {GeMIPS_1/regfile_1/regs[9]__0[25]} {GeMIPS_1/regfile_1/regs[9]__0[26]} {GeMIPS_1/regfile_1/regs[9]__0[27]} {GeMIPS_1/regfile_1/regs[9]__0[28]} {GeMIPS_1/regfile_1/regs[9]__0[29]} {GeMIPS_1/regfile_1/regs[9]__0[30]} {GeMIPS_1/regfile_1/regs[9]__0[31]}]]
connect_debug_port u_ila_0/probe33 [get_nets [list {GeMIPS_1/regfile_1/regs[17]__0[0]} {GeMIPS_1/regfile_1/regs[17]__0[1]} {GeMIPS_1/regfile_1/regs[17]__0[2]} {GeMIPS_1/regfile_1/regs[17]__0[3]} {GeMIPS_1/regfile_1/regs[17]__0[4]} {GeMIPS_1/regfile_1/regs[17]__0[5]} {GeMIPS_1/regfile_1/regs[17]__0[6]} {GeMIPS_1/regfile_1/regs[17]__0[7]} {GeMIPS_1/regfile_1/regs[17]__0[8]} {GeMIPS_1/regfile_1/regs[17]__0[9]} {GeMIPS_1/regfile_1/regs[17]__0[10]} {GeMIPS_1/regfile_1/regs[17]__0[11]} {GeMIPS_1/regfile_1/regs[17]__0[12]} {GeMIPS_1/regfile_1/regs[17]__0[13]} {GeMIPS_1/regfile_1/regs[17]__0[14]} {GeMIPS_1/regfile_1/regs[17]__0[15]} {GeMIPS_1/regfile_1/regs[17]__0[16]} {GeMIPS_1/regfile_1/regs[17]__0[17]} {GeMIPS_1/regfile_1/regs[17]__0[18]} {GeMIPS_1/regfile_1/regs[17]__0[19]} {GeMIPS_1/regfile_1/regs[17]__0[20]} {GeMIPS_1/regfile_1/regs[17]__0[21]} {GeMIPS_1/regfile_1/regs[17]__0[22]} {GeMIPS_1/regfile_1/regs[17]__0[23]} {GeMIPS_1/regfile_1/regs[17]__0[24]} {GeMIPS_1/regfile_1/regs[17]__0[25]} {GeMIPS_1/regfile_1/regs[17]__0[26]} {GeMIPS_1/regfile_1/regs[17]__0[27]} {GeMIPS_1/regfile_1/regs[17]__0[28]} {GeMIPS_1/regfile_1/regs[17]__0[29]} {GeMIPS_1/regfile_1/regs[17]__0[30]} {GeMIPS_1/regfile_1/regs[17]__0[31]}]]



set_property MARK_DEBUG true [get_nets GeMIPS_1/regfile_1/we]



set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_we]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_we_1]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_we_o]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_we_o_1]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata_o[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_26[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_debug_regs_27[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_id_stop]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_if_stop]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_inst[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_mem_stop_end]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_opcode[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_opcode[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_opcode[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_opcode[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_opcode[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_opcode[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_p_0_in[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_pc[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_1[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_1[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_1[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_1[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_1[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_2[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_2[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_2[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_2[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_raddr_2[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_1[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_rdata_2[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_re_1]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_re_2]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[0]_1}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[1]_1}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[2]_1}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[3]_1}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr[4]_1}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr_o[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr_o[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr_o[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr_o[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_waddr_o[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_wdata[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[17]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[18]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[19]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[20]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[21]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[22]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[23]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[24]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[25]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[26]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[27]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[28]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[29]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[30]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[31]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[32]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[33]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[34]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[35]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_iport0_o_0[36]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[8]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[9]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[10]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[11]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[12]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[13]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[14]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[15]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {sl_oport0_i_0[16]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_tx[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_buffer[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[0]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[1]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[2]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[3]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[4]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[5]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[6]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets {u_ila_0_ext_uart_rx[7]}]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_ext_uart_avai]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_ext_uart_busy]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_ext_uart_clear]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_ext_uart_ready]
set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets u_ila_0_ext_uart_start]
connect_debug_port u_ila_0/probe0 [get_nets [list {GeMIPS_1/id_1/opcode[0]} {GeMIPS_1/id_1/opcode[1]} {GeMIPS_1/id_1/opcode[2]} {GeMIPS_1/id_1/opcode[3]} {GeMIPS_1/id_1/opcode[4]} {GeMIPS_1/id_1/opcode[5]}]]
connect_debug_port u_ila_0/probe1 [get_nets [list {GeMIPS_1/id_1/inst[0]} {GeMIPS_1/id_1/inst[1]} {GeMIPS_1/id_1/inst[2]} {GeMIPS_1/id_1/inst[3]} {GeMIPS_1/id_1/inst[4]} {GeMIPS_1/id_1/inst[5]} {GeMIPS_1/id_1/inst[6]} {GeMIPS_1/id_1/inst[7]} {GeMIPS_1/id_1/inst[8]} {GeMIPS_1/id_1/inst[9]} {GeMIPS_1/id_1/inst[10]} {GeMIPS_1/id_1/inst[11]} {GeMIPS_1/id_1/inst[12]} {GeMIPS_1/id_1/inst[13]} {GeMIPS_1/id_1/inst[14]} {GeMIPS_1/id_1/inst[15]} {GeMIPS_1/id_1/inst[16]} {GeMIPS_1/id_1/inst[17]} {GeMIPS_1/id_1/inst[18]} {GeMIPS_1/id_1/inst[19]} {GeMIPS_1/id_1/inst[20]} {GeMIPS_1/id_1/inst[21]} {GeMIPS_1/id_1/inst[22]} {GeMIPS_1/id_1/inst[23]} {GeMIPS_1/id_1/inst[24]} {GeMIPS_1/id_1/inst[25]}]]
connect_debug_port u_ila_0/probe2 [get_nets [list {GeMIPS_1/id_1/waddr[0]} {GeMIPS_1/id_1/waddr[1]} {GeMIPS_1/id_1/waddr[2]} {GeMIPS_1/id_1/waddr[3]} {GeMIPS_1/id_1/waddr[4]}]]
connect_debug_port u_ila_0/probe3 [get_nets [list {GeMIPS_1/id_1/pc[0]} {GeMIPS_1/id_1/pc[1]} {GeMIPS_1/id_1/pc[2]} {GeMIPS_1/id_1/pc[3]} {GeMIPS_1/id_1/pc[4]} {GeMIPS_1/id_1/pc[5]} {GeMIPS_1/id_1/pc[6]} {GeMIPS_1/id_1/pc[7]} {GeMIPS_1/id_1/pc[8]} {GeMIPS_1/id_1/pc[9]} {GeMIPS_1/id_1/pc[10]} {GeMIPS_1/id_1/pc[11]} {GeMIPS_1/id_1/pc[12]} {GeMIPS_1/id_1/pc[13]} {GeMIPS_1/id_1/pc[14]} {GeMIPS_1/id_1/pc[15]} {GeMIPS_1/id_1/pc[16]} {GeMIPS_1/id_1/pc[17]} {GeMIPS_1/id_1/pc[18]} {GeMIPS_1/id_1/pc[19]} {GeMIPS_1/id_1/pc[20]} {GeMIPS_1/id_1/pc[21]} {GeMIPS_1/id_1/pc[22]} {GeMIPS_1/id_1/pc[23]} {GeMIPS_1/id_1/pc[24]} {GeMIPS_1/id_1/pc[25]} {GeMIPS_1/id_1/pc[26]} {GeMIPS_1/id_1/pc[27]} {GeMIPS_1/id_1/pc[28]} {GeMIPS_1/id_1/pc[29]} {GeMIPS_1/id_1/pc[30]} {GeMIPS_1/id_1/pc[31]}]]
connect_debug_port u_ila_0/probe4 [get_nets [list {GeMIPS_1/mem_1/wdata_o[0]} {GeMIPS_1/mem_1/wdata_o[1]} {GeMIPS_1/mem_1/wdata_o[2]} {GeMIPS_1/mem_1/wdata_o[3]} {GeMIPS_1/mem_1/wdata_o[4]} {GeMIPS_1/mem_1/wdata_o[5]} {GeMIPS_1/mem_1/wdata_o[6]} {GeMIPS_1/mem_1/wdata_o[7]} {GeMIPS_1/mem_1/wdata_o[8]} {GeMIPS_1/mem_1/wdata_o[9]} {GeMIPS_1/mem_1/wdata_o[10]} {GeMIPS_1/mem_1/wdata_o[11]} {GeMIPS_1/mem_1/wdata_o[12]} {GeMIPS_1/mem_1/wdata_o[13]} {GeMIPS_1/mem_1/wdata_o[14]} {GeMIPS_1/mem_1/wdata_o[15]} {GeMIPS_1/mem_1/wdata_o[16]} {GeMIPS_1/mem_1/wdata_o[17]} {GeMIPS_1/mem_1/wdata_o[18]} {GeMIPS_1/mem_1/wdata_o[19]} {GeMIPS_1/mem_1/wdata_o[20]} {GeMIPS_1/mem_1/wdata_o[21]} {GeMIPS_1/mem_1/wdata_o[22]} {GeMIPS_1/mem_1/wdata_o[23]} {GeMIPS_1/mem_1/wdata_o[24]} {GeMIPS_1/mem_1/wdata_o[25]} {GeMIPS_1/mem_1/wdata_o[26]} {GeMIPS_1/mem_1/wdata_o[27]} {GeMIPS_1/mem_1/wdata_o[28]} {GeMIPS_1/mem_1/wdata_o[29]} {GeMIPS_1/mem_1/wdata_o[30]} {GeMIPS_1/mem_1/wdata_o[31]}]]
connect_debug_port u_ila_0/probe7 [get_nets [list {GeMIPS_1/mem_1/p_0_in[0]} {GeMIPS_1/mem_1/p_0_in[1]} {GeMIPS_1/mem_1/p_0_in[2]} {GeMIPS_1/mem_1/p_0_in[3]} {GeMIPS_1/mem_1/p_0_in[4]} {GeMIPS_1/mem_1/p_0_in[5]} {GeMIPS_1/mem_1/p_0_in[6]} {GeMIPS_1/mem_1/p_0_in[7]}]]
connect_debug_port u_ila_0/probe8 [get_nets [list {GeMIPS_1/regfile_1/debug_regs_27[0]} {GeMIPS_1/regfile_1/debug_regs_27[1]} {GeMIPS_1/regfile_1/debug_regs_27[2]} {GeMIPS_1/regfile_1/debug_regs_27[3]} {GeMIPS_1/regfile_1/debug_regs_27[4]} {GeMIPS_1/regfile_1/debug_regs_27[5]} {GeMIPS_1/regfile_1/debug_regs_27[6]} {GeMIPS_1/regfile_1/debug_regs_27[7]} {GeMIPS_1/regfile_1/debug_regs_27[8]} {GeMIPS_1/regfile_1/debug_regs_27[9]} {GeMIPS_1/regfile_1/debug_regs_27[10]} {GeMIPS_1/regfile_1/debug_regs_27[11]} {GeMIPS_1/regfile_1/debug_regs_27[12]} {GeMIPS_1/regfile_1/debug_regs_27[13]} {GeMIPS_1/regfile_1/debug_regs_27[14]} {GeMIPS_1/regfile_1/debug_regs_27[15]} {GeMIPS_1/regfile_1/debug_regs_27[16]} {GeMIPS_1/regfile_1/debug_regs_27[17]} {GeMIPS_1/regfile_1/debug_regs_27[18]} {GeMIPS_1/regfile_1/debug_regs_27[19]} {GeMIPS_1/regfile_1/debug_regs_27[20]} {GeMIPS_1/regfile_1/debug_regs_27[21]} {GeMIPS_1/regfile_1/debug_regs_27[22]} {GeMIPS_1/regfile_1/debug_regs_27[23]} {GeMIPS_1/regfile_1/debug_regs_27[24]} {GeMIPS_1/regfile_1/debug_regs_27[25]} {GeMIPS_1/regfile_1/debug_regs_27[26]} {GeMIPS_1/regfile_1/debug_regs_27[27]} {GeMIPS_1/regfile_1/debug_regs_27[28]} {GeMIPS_1/regfile_1/debug_regs_27[29]} {GeMIPS_1/regfile_1/debug_regs_27[30]} {GeMIPS_1/regfile_1/debug_regs_27[31]}]]
connect_debug_port u_ila_0/probe9 [get_nets [list {GeMIPS_1/regfile_1/debug_regs_26[0]} {GeMIPS_1/regfile_1/debug_regs_26[1]} {GeMIPS_1/regfile_1/debug_regs_26[2]} {GeMIPS_1/regfile_1/debug_regs_26[3]} {GeMIPS_1/regfile_1/debug_regs_26[4]} {GeMIPS_1/regfile_1/debug_regs_26[5]} {GeMIPS_1/regfile_1/debug_regs_26[6]} {GeMIPS_1/regfile_1/debug_regs_26[7]} {GeMIPS_1/regfile_1/debug_regs_26[8]} {GeMIPS_1/regfile_1/debug_regs_26[9]} {GeMIPS_1/regfile_1/debug_regs_26[10]} {GeMIPS_1/regfile_1/debug_regs_26[11]} {GeMIPS_1/regfile_1/debug_regs_26[12]} {GeMIPS_1/regfile_1/debug_regs_26[13]} {GeMIPS_1/regfile_1/debug_regs_26[14]} {GeMIPS_1/regfile_1/debug_regs_26[15]} {GeMIPS_1/regfile_1/debug_regs_26[16]} {GeMIPS_1/regfile_1/debug_regs_26[17]} {GeMIPS_1/regfile_1/debug_regs_26[18]} {GeMIPS_1/regfile_1/debug_regs_26[19]} {GeMIPS_1/regfile_1/debug_regs_26[20]} {GeMIPS_1/regfile_1/debug_regs_26[21]} {GeMIPS_1/regfile_1/debug_regs_26[22]} {GeMIPS_1/regfile_1/debug_regs_26[23]} {GeMIPS_1/regfile_1/debug_regs_26[24]} {GeMIPS_1/regfile_1/debug_regs_26[25]} {GeMIPS_1/regfile_1/debug_regs_26[26]} {GeMIPS_1/regfile_1/debug_regs_26[27]} {GeMIPS_1/regfile_1/debug_regs_26[28]} {GeMIPS_1/regfile_1/debug_regs_26[29]} {GeMIPS_1/regfile_1/debug_regs_26[30]} {GeMIPS_1/regfile_1/debug_regs_26[31]}]]
connect_debug_port u_ila_0/probe10 [get_nets [list {GeMIPS_1/mem_1/waddr_o[0]} {GeMIPS_1/mem_1/waddr_o[1]} {GeMIPS_1/mem_1/waddr_o[2]} {GeMIPS_1/mem_1/waddr_o[3]} {GeMIPS_1/mem_1/waddr_o[4]}]]
connect_debug_port u_ila_0/probe15 [get_nets [list {RAM_1/ram2_data_i[0]} {RAM_1/ram2_data_i[1]} {RAM_1/ram2_data_i[2]} {RAM_1/ram2_data_i[3]} {RAM_1/ram2_data_i[4]} {RAM_1/ram2_data_i[5]} {RAM_1/ram2_data_i[6]} {RAM_1/ram2_data_i[7]} {RAM_1/ram2_data_i[8]} {RAM_1/ram2_data_i[9]} {RAM_1/ram2_data_i[10]} {RAM_1/ram2_data_i[11]} {RAM_1/ram2_data_i[12]} {RAM_1/ram2_data_i[13]} {RAM_1/ram2_data_i[14]} {RAM_1/ram2_data_i[15]} {RAM_1/ram2_data_i[16]} {RAM_1/ram2_data_i[17]} {RAM_1/ram2_data_i[18]} {RAM_1/ram2_data_i[19]} {RAM_1/ram2_data_i[20]} {RAM_1/ram2_data_i[21]} {RAM_1/ram2_data_i[22]} {RAM_1/ram2_data_i[23]} {RAM_1/ram2_data_i[24]} {RAM_1/ram2_data_i[25]} {RAM_1/ram2_data_i[26]} {RAM_1/ram2_data_i[27]} {RAM_1/ram2_data_i[28]} {RAM_1/ram2_data_i[29]} {RAM_1/ram2_data_i[30]} {RAM_1/ram2_data_i[31]}]]
connect_debug_port u_ila_0/probe18 [get_nets [list {RAM_1/ext_uart_buffer[0]} {RAM_1/ext_uart_buffer[1]} {RAM_1/ext_uart_buffer[2]} {RAM_1/ext_uart_buffer[3]} {RAM_1/ext_uart_buffer[4]} {RAM_1/ext_uart_buffer[5]} {RAM_1/ext_uart_buffer[6]} {RAM_1/ext_uart_buffer[7]}]]
connect_debug_port u_ila_0/probe19 [get_nets [list {RAM_1/ram2_addr_i[0]} {RAM_1/ram2_addr_i[1]} {RAM_1/ram2_addr_i[2]} {RAM_1/ram2_addr_i[3]} {RAM_1/ram2_addr_i[4]} {RAM_1/ram2_addr_i[5]} {RAM_1/ram2_addr_i[6]} {RAM_1/ram2_addr_i[7]} {RAM_1/ram2_addr_i[8]} {RAM_1/ram2_addr_i[9]} {RAM_1/ram2_addr_i[10]} {RAM_1/ram2_addr_i[11]} {RAM_1/ram2_addr_i[12]} {RAM_1/ram2_addr_i[13]} {RAM_1/ram2_addr_i[14]} {RAM_1/ram2_addr_i[15]} {RAM_1/ram2_addr_i[16]} {RAM_1/ram2_addr_i[17]} {RAM_1/ram2_addr_i[18]} {RAM_1/ram2_addr_i[19]} {RAM_1/ram2_addr_i[20]} {RAM_1/ram2_addr_i[21]} {RAM_1/ram2_addr_i[22]} {RAM_1/ram2_addr_i[23]} {RAM_1/ram2_addr_i[24]} {RAM_1/ram2_addr_i[25]} {RAM_1/ram2_addr_i[26]} {RAM_1/ram2_addr_i[27]} {RAM_1/ram2_addr_i[28]} {RAM_1/ram2_addr_i[29]} {RAM_1/ram2_addr_i[30]} {RAM_1/ram2_addr_i[31]}]]
connect_debug_port u_ila_0/probe20 [get_nets [list {RAM_1/ram2_data_o[0]} {RAM_1/ram2_data_o[1]} {RAM_1/ram2_data_o[2]} {RAM_1/ram2_data_o[3]} {RAM_1/ram2_data_o[4]} {RAM_1/ram2_data_o[5]} {RAM_1/ram2_data_o[6]} {RAM_1/ram2_data_o[7]} {RAM_1/ram2_data_o[8]} {RAM_1/ram2_data_o[9]} {RAM_1/ram2_data_o[10]} {RAM_1/ram2_data_o[11]} {RAM_1/ram2_data_o[12]} {RAM_1/ram2_data_o[13]} {RAM_1/ram2_data_o[14]} {RAM_1/ram2_data_o[15]} {RAM_1/ram2_data_o[16]} {RAM_1/ram2_data_o[17]} {RAM_1/ram2_data_o[18]} {RAM_1/ram2_data_o[19]} {RAM_1/ram2_data_o[20]} {RAM_1/ram2_data_o[21]} {RAM_1/ram2_data_o[22]} {RAM_1/ram2_data_o[23]} {RAM_1/ram2_data_o[24]} {RAM_1/ram2_data_o[25]} {RAM_1/ram2_data_o[26]} {RAM_1/ram2_data_o[27]} {RAM_1/ram2_data_o[28]} {RAM_1/ram2_data_o[29]} {RAM_1/ram2_data_o[30]} {RAM_1/ram2_data_o[31]}]]
connect_debug_port u_ila_0/probe21 [get_nets [list {RAM_1/ext_uart_rx[0]} {RAM_1/ext_uart_rx[1]} {RAM_1/ext_uart_rx[2]} {RAM_1/ext_uart_rx[3]} {RAM_1/ext_uart_rx[4]} {RAM_1/ext_uart_rx[5]} {RAM_1/ext_uart_rx[6]} {RAM_1/ext_uart_rx[7]}]]
connect_debug_port u_ila_0/probe22 [get_nets [list RAM_1/ext_uart_avai]]
connect_debug_port u_ila_0/probe23 [get_nets [list RAM_1/ext_uart_busy]]
connect_debug_port u_ila_0/probe24 [get_nets [list RAM_1/ext_uart_clear]]
connect_debug_port u_ila_0/probe26 [get_nets [list RAM_1/ext_uart_start]]
connect_debug_port u_ila_0/probe27 [get_nets [list GeMIPS_1/STOPS_1/id_stop]]
connect_debug_port u_ila_0/probe28 [get_nets [list GeMIPS_1/STOPS_1/if_stop]]
connect_debug_port u_ila_0/probe29 [get_nets [list GeMIPS_1/id_1/is_stop]]
connect_debug_port u_ila_0/probe30 [get_nets [list GeMIPS_1/STOPS_1/mem_stop_end]]
connect_debug_port u_ila_0/probe31 [get_nets [list RAM_1/ram2_we_i]]
connect_debug_port u_ila_0/probe34 [get_nets [list GeMIPS_1/mem_1/stop_end]]
connect_debug_port u_ila_0/probe35 [get_nets [list GeMIPS_1/pc_reg_1/stops_stop]]
connect_debug_port u_ila_0/probe37 [get_nets [list GeMIPS_1/id_1/we]]
connect_debug_port u_ila_0/probe38 [get_nets [list GeMIPS_1/ex_1/we_o]]
connect_debug_port u_ila_0/probe39 [get_nets [list GeMIPS_1/mem_1/we_o]]
connect_debug_port dbg_hub/clk [get_nets clk_10M]







